LFEC6E-3F256C LATTICE SEMICONDUCTOR, LFEC6E-3F256C Datasheet - Page 61

• Manufacturer Part Number: LFEC6E-3F256C
• Description: FPGA LatticeEC Family 6100 Cells 340MHz 130nm (CMOS) Technology 1.2V 256-Pin FBGA
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of LFEC6E-3F256C

• Package: 256FBGA
• Family Name: LatticeEC
• Device Logic Units: 6100
• Maximum Internal Frequency: 340 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 195
• Ram Bits: 94208
• In System Programmability: Yes

Lattice Semiconductor
Master Clock
LatticeECP/EC sysCONFIG Port Timing Specifications (Continued)
2.5MHz
5 MHz
10 MHz
15 MHz
20 MHz
25 MHz
30 MHz
35 MHz
40 MHz
45 MHz
50 MHz
55 MHz
60 MHz
Duty Cycle
Timing v.G 0.30
t
t
f
t
t
Timing v.G 0.30
SOE
CSPID
MAXSPI
SUSPI
HSPI
Parameter
Clock Mode
CSSPIN Active Setup Time
CSSPIN Low to First Clock Edge Setup Time
Max Frequency for SPI
SOSPI Data Setup Time Before CCLK
SOSPI Data Hold Time After CCLK
Min.
1.75
3.78
10.5
18.2
23.8
28.7
31.5
35.7
38.5
14
21
42
40
7
Over Recommended Operating Conditions
Description
3-25
Typ.
2.5
5.4
10
15
20
26
30
34
41
45
51
55
60
—
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
300+3cyc
Max.
3.25
7.02
19.5
33.8
44.2
53.3
58.5
66.3
71.5
13
26
39
78
60
Min.
300
—
7
1
Typ.
600+6cyc
Max.
25
—
—
—
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
%
Units
MHz
ns
ns
ns
ns