LU82551IT S L7G3 Intel, LU82551IT S L7G3 Datasheet - Page 40
LU82551IT S L7G3
Manufacturer Part Number
LU82551IT S L7G3
Description
Manufacturer
Intel
Datasheet
1.LU82551IT_S_L7G3.pdf
(102 pages)
Specifications of LU82551IT S L7G3
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
196
Lead Free Status / RoHS Status
Compliant
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82551IT — Networking Silicon
5.7
34
Media Independent Interface (MII) Management Interface
The MII management interface allows the CPU to control the PHY unit through a control register
in the 82551IT. This allows the software driver to place the PHY in specific modes such as full
duplex, loopback, power down, etc., without the need for specific hardware pins to select the
desired mode. This structure allows the 82551IT to query the PHY unit for status of the link. This
register is the MDI Control Register and resides at offset 10h in the 82551IT CSR. (The MDI
registers are described in detail in
to this register and the 82551IT reads or writes the control/status parameters to the PHY unit
through the MDI register. Although the 82551IT follows the MII format, the MI bus is not
accessible on external pins.
Section 9.0, “PHY Unit
Registers”.) The CPU writes commands
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