LFE3-95EA-6FN484I Lattice, LFE3-95EA-6FN484I Datasheet - Page 19

• Manufacturer Part Number: LFE3-95EA-6FN484I
• Description: IC FPGA 92KLUTS 295I/O 484FPBGA
• Manufacturer: Lattice

Specifications of LFE3-95EA-6FN484I

• Number Of Logic Elements/cells: *
• Number Of Labs/clbs: *
• Total Ram Bits: 4526080
• Number Of I /o: 295
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: *
• Operating Temperature: -40°C ~ 100°C
• Package / Case: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 220-1096

Lattice Semiconductor
Figure 2-16. Per Region Secondary Clock Selection
Slice Clock Selection
Figure 2-17 shows the clock selections and Figure 2-18 shows the control selections for Slice0 through Slice2. All
the primary clocks and seven secondary clocks are routed to this clock selection mux. Other signals can be used
as a clock input to the slices via routing. Slice controls are generated from the secondary clocks/controls or other
signals connected via routing.
If none of the signals are selected for both clock and control then the default value of the mux output is 1. Slice 3
does not have any registers; therefore it does not have the clock or control muxes.
Figure 2-17. Slice0 through Slice2 Clock Selection
Figure 2-18. Slice0 through Slice2 Control Selection
SC0
8:1
SC1
Secondary Clock
Secondary Control
8:1
Primary Clock
Secondary Clock Feedlines: 6 PIOs + 16 Routing
8 Secondary Clocks (SC0 to SC7) per Region
SC2
Routing
Routing
8:1
Vcc
Vcc
SC3
8:1
Clock/Control
12
14
8
7
1
5
1
SC4
2-16
8:1
SC5
28:1
20:1
8:1
Clock to Slice
Slice Control
SC6
8:1
LatticeECP3 Family Data Sheet
SC7
8:1
Architecture