LC4064ZE-5MN64C Lattice, LC4064ZE-5MN64C Datasheet - Page 13

• Manufacturer Part Number: LC4064ZE-5MN64C
• Description: IC PLD 64MC 48I/O 5.8NS 64CSBGA
• Manufacturer: Lattice
• Series: ispMACH®r

Specifications of LC4064ZE-5MN64C

• Programmable Type: CPLD
• Number Of Macrocells: 64
• Voltage - Input: 1.7 V ~ 1.9 V
• Speed: 5.8ns
• Mounting Type: *
• Package / Case: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 220-1017

Lattice Semiconductor
The block-level OE PT of each GLB is also tied to Block Input Enable (BIE) of that block. Hence, for a 256-macro-
cell device (with 16 blocks), each block's BIE signal is driven by block-level OE PT from each block.
Figure 11. Global OE Generation for All Devices Except ispMACH 4032ZE
Figure 12. Global OE Generation for ispMACH 4032ZE
On-Chip Oscillator and Timer
An internal oscillator is provided for use in miscellaneous housekeeping functions such as watchdog heartbeats,
digital de-glitch circuits and control state machines. The oscillator is disabled by default to save power. Figure 13
shows the block diagram of the oscillator and timer block.
Shared PTOE
(Block 0)
Shared PTOE
(Block n)
Shared PTOE
(Block 0)
Shared PTOE
(Block 1)
Internal Global OE
Internal Global OE
Fuse connection
Hard wired
(4 lines)
PT Bus
(2 lines)
PT Bus
Fuse connection
Hard wired
BIE0
BIE1
BIE0
BIEn
Global OE
13
Global OE
Global
Fuses
Global
Fuses
ispMACH 4000ZE Family Data Sheet
Global OE Bus
to I/O cells
GOE (3:0)
4-Bit
Global OE Bus
to I/O cells
GOE (0:3)
4-Bit