IDTCV122CPVG IDT, Integrated Device Technology Inc, IDTCV122CPVG Datasheet - Page 3

• Manufacturer Part Number: IDTCV122CPVG
• Description: IC FLEXPC CLK PROGR P4 56-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: FlexPC™r
• Type: PC Clockr

Specifications of IDTCV122CPVG

• Input: Crystal
• Output: Clock
• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-SSOP
• Frequency-max: 400MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: CV122CPVG

PIN DESCRIPTION
IDTCV122C
PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR
Pin Number
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
1
2
3
4
5
6
7
8
9
CPUC2_ITP/ SRCC7
CPUT2_ITP/ SRCT7
V
PCIF0/ITP_EN
SRCC4_SATA
SEL24/24_48#
SRCT4_SATA
FS_B/48MHz
TT
PCI4/Turbo
V
V
V
V
V
_P
V
V
V
V
DOT96C
CPUC1
CPUC0
DOT96T
SRCC1
SRCC2
SRCC3
SRCC5
SRCC6
CPUT1
CPUT0
V
SRCT1
DD
SRCT2
SRCT3
DD
SRCT5
SRCT6
DD
DD
PCIF1
PCIF2
V
SS
Reset#
Name
DD
DD
SS
SS
PCI2
PCI3
IREF
SDA
DD
SS
WRGD
V
V
V
_SRC
_SRC
_SRC
_SRC
_CPU
_PCI
_PCI
_PCI
_PCI
SS
SS
SS
_48
_48
#/PD
Type
PWR
GND
GND
PWR
PWR
GND
PWR
GND
GND
PWR
GND
PWR
GND
PWR
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
I/O
I/O
I/O
I/O
I/0
I N
3.3V
GND
PCI clock
PCI clock
PCI clock output or Turbo input. Byte30 bit3 mode selection. Byte30 bit3=1, PCI clock. Byte30 bit3=0,
Turbo mode. In Turbo mode, 1 = load TCN and TPN into CPU and SRC PLL.
GND
3.3V
PCI clock, free running. CPU_2 select (sampled at V
PCI clock
PCI clock
3.3V
24MHz or 48MHz mode select, SEL24=1, 24MHz, =0, 48MHz, internal pull high. 24MHz or 48MHz
clock output afterward.
CPU frequency selection. 48MHz clock afterward
GND
96MHz 0.7V current mode differential clock output
96MHz 0.7V current mode differential clock output
3.3V LVTTL input is a level-sensitive strobe used to latch the FS_A, FS_B, FS_C/TEST_SEL and
PCIF_0/ITP_EN inputs. After V
down (active HIGH), internal pull LOW.
Differential Serial reference clock
Differential Serial reference clock
3.3V
GND
Differential Serial reference clock
Differential Serial reference clock
Differential Serial reference clock
Differential Serial reference clock
GND
SATA clock
SATA clock
3.3V
GND
Differential Serial reference clock
Differential Serial reference clock
Differential Serial reference clock
Differential Serial reference clock
3.3V
Selectable CPU or SRC differential clock output. ITP_EN=0 @ V
Selectable CPU or SRC differential clock output. ITP_EN=0 @ V
Reset output
Reference current for differential output buffer
GND
Host 0.7V current mode differential clock output
Host 0.7V current mode differential clock output
3.3V
Host 0.7V current mode differential clock output
Host 0.7V current mode differential clock output
SM bus data
3
TT
_P
WRGD
assertion, becomes a real-time input for asserting power
Description
COMMERCIAL TEMPERATURE RANGE
TT
_P
WRGD
# assertion), HIGH = CPU_2.
TT
TT
_P
_P
WRGD
WRGD
assertion = SRCT7
assertion = SRCC7