IDTCV122CPVG IDT, Integrated Device Technology Inc, IDTCV122CPVG Datasheet - Page 4

• Manufacturer Part Number: IDTCV122CPVG
• Description: IC FLEXPC CLK PROGR P4 56-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: FlexPC™r
• Type: PC Clockr

Specifications of IDTCV122CPVG

• Input: Crystal
• Output: Clock
• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-SSOP
• Frequency-max: 400MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: CV122CPVG

PIN DESCRIPTION (CONT.)
INDEX BYTE WRITE
Setting bit[11:18] = starting address, bit[20:27] = 01h.
INDEX BLOCK WRITE PROTOCOL
IDTCV122C
PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR
Pin Number
11-18
20-27
29-36
38-45
Bit
2-9
10
19
28
37
46
1
47
48
49
50
51
52
53
54
55
56
# of bits
1
8
1
8
1
8
1
8
1
8
1
FS_A(REF1/PCI5)
V
FS_C/REF0
XTAL_OUT
DD
V
XTAL_IN
V
DD
SS
_Suspend
Name
PCI0
PCI1
SCL
_REF
_REF
Master
Master
Master
Master
Master
Master
Master
Master
From
Slave
Slave
Slave
Slave
Slave
Slave
Start
D2h
Ack (Acknowledge)
Register offset byte (starting byte)
Ack (Acknowledge)
Byte count, N (0 is not valid)
Ack (Acknowledge)
first data byte (Offset data byte)
Ack (Acknowledge)
2nd data byte
Ack (Acknowledge)
:
Nth data byte
Acknowledge
Stop
Type
PWR
GND
PWR
OUT
OUT
OUT
I/O
I/O
I N
I N
Description
SM Bus CLK
3.3V
XTAL output
XTAL input
GND
CPU frequency selection input at V
Keep supply 3.3V in the power down
CPU frequency selection input at V
programmed through SMBus Register Byte 1.
PCI clock
PCI clock
4
INDEX BLOCK READ PROTOCOL
Master can stop reading any time by issuing the Stop bit without waiting
until N byte (byte count bit 30-37).
INDEX BYTE READ
Setting bit[11:18] = starting address. After reading back the first data byte,
master issues Stop bit.
11-18
21-28
30-37
39-46
48-55
Bit
2-9
10
19
20
29
38
47
1
TT
TT
# of bits
_P
_P
WRGD
1
8
1
8
1
1
8
1
8
1
8
1
8
WRGD
assertion. 14.318 reference clock output afterward.
assertion. 14.318 reference clock output or PCI clock,
Description
COMMERCIAL TEMPERATURE RANGE
Master
Master
Master
Master
Master
Master
Master
Master
Master
From
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Start
D2h
Ack (Acknowledge)
Register offset byte (starting byte)
Ack (Acknowledge)
Repeated Start
D3h
Ack (Acknowledge)
Byte count, N (Byte 8)
Ack (Acknowledge)
first data byte (Offset data byte)
Ack (Acknowledge)
2nd data byte
Ack (Acknowledge)
Ack (Acknowledge)
Nth data byte
Not acknowledge
Stop
:
Description