ICS932S208DG IDT, Integrated Device Technology Inc, ICS932S208DG Datasheet - Page 12

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ICS932S208DG

Manufacturer Part Number
ICS932S208DG
Description
IC TIMING HUB CTRL PROGR 56TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Timing Control Hubr
Datasheet

Specifications of ICS932S208DG

Input
Crystal
Output
Clock
Frequency - Max
200MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-TSSOP
Frequency-max
200MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
932S208DG

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IDT
I
I
I
2
2
2
C Table: Read-Back Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
C Table: Spreading and Device Behavior Control Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
C Table: Output Control Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ICS932S208
Programmable Timing Control Hub
TM
Programmable Timing Control Hub
Byte 0
Byte 1
Byte 2
38, 37
38, 37
44, 43
41, 40
38, 37
38, 37
44, 43
41, 40
47, 46
47, 46
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Pin #
Pin #
Pin #
CPUT2_PD# Drive
CPUT1_PD# Drive
CPUT0_PD# Drive
CPUT2/CPUC2
CPUT1/CPUC1
CPUT0/CPUC0
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
SRC_Stop#
SRC/SRC#
Drive Mode
Drive Mode
SRC_PD#
TM
Name
Name
Name
Mode
Mode
Mode
for Next Gen P4
SRC
TM
FSB
FSA
for Next Gen P4
TM
Freq Select 1 Read
Freq Select 0 Read
SRC Free-Running
Control Function
Control Function
Control Function
Processor
0: Driven in PD#
0:driven in PD#
Output Control
Output Control
Output Control
Output Enable
TM
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
1: Tri-stated
0: Driven in
PCI_Stop#
Processor
Control
Back
Back
12
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
R
-
-
-
-
-
-
-
-
-
-
-
-
FREE-RUN
READBACK of CPU(3:0)
Disable
Disable
Disable
Disable
Driven
Driven
Driven
Driven
Driven
0
0
0
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
Frequency
STOPPABLE
Enable
Enable
Enable
Enable
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
1
1
1
PWD
PWD
PWD
0743G—01/26/10
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
1
1
1
0
0
0
0
0

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