FPD87352CXAVV/NOPB National Semiconductor, FPD87352CXAVV/NOPB Datasheet

FPD87352CXAVV/NOPB

Manufacturer Part Number

FPD87352CXAVV/NOPB

Description

IC TIMING CTLR TFT-LCD 176-LQFP

Manufacturer

National Semiconductor

Type

Panel Timing Controllerr

Datasheet

1.FPD87352CXAVVNOPB.pdf (5 pages)

Specifications of FPD87352CXAVV/NOPB

Input

LVDS

Output

RSDS

Frequency - Max

95MHz

Voltage - Supply

3 V ~ 3.6 V

Operating Temperature

0°C ~ 70°C

Mounting Type

Surface Mount

Package / Case

176-LQFP

Frequency-max

95MHz

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Other names

FPD87352CXAVV

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

BOSTOCK HK LIMITED

Part Number:

FPD87352CXAVV/NOPB

Manufacturer:

Texas Instruments

Quantity:

10 000

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FPD87352CXA

+3.3V TFT-LCD Timing Controller with Single LVDS

Input/Dual RSDS

Time Compensation) for TFT-LCD Monitors and TV

(XGA/WXGA/HDTV I,II,-)

General Description

The FPD87352CXA is an integrated FPD-Link

TFT-LCD Timing Controller. The logic architecture is imple-

mented using standard and default timing controller function-

ality based on an Embedded Gate Array. The device is

reconfigurable to the needs of a specific application by pro-

viding user-defined specifications or customer supplied

VHDL/Verilog code.

The FPD87352CXA is an ideal Timing Controller for LCD TV

Applications. It has a unique feature, RTC that will improve

the intra-gray level response time of a LCD TV panel. Im-

proving the intra-gray level response time of the LCD panel

will result in a dramatically improved Motion Picture Image

Quality of video content that are displayed on the LCD panel.

The RTC feature is accomplished through application of a

Boost or Overdrive Voltage that will force the LC material to

respond more rapidly. This Boost or Overdrive is accom-

plished through combination of an internal or external EE-

PROM LUT (Look Up Table), which contains the boost/

overdrive levels, and external memory that acts as a Frame

Buffer.

The FPD87352CXA is a timing controller that combines an

LVDS single pixel input interface with National’s Reduced

Swing Differential Signaling (RSDS) output column driver

interface for XGA/WXGA/HDTV I,II,- resolutions. It resides

on the Flat Panel Display and provides the data buffering

and control signal generation. FPD-Link, a lower dynamic

power, low EMI (Electro Magnetic Interference) interface is

used between this timing controller and the host system. A

RSDS interface is used between the timing controller and

the column drivers.

The dual 13/10 pair differential bus conveys up to 24-bit

color data for XGA, WXGA and HDTV panels.

RSDS

™

is a trademark of National Semiconductor Corporation.

™

DS201162

Outputs Including RTC (Response

™

+ RSDS +

Features

n Input frequency range from 30 MHz to 95 MHz

n Support display resolutions XGA (1024x768), WXGA

n Embedded gate array for custom panel timing

n LVDS single pixel input (8-bit/6-bit) interface (FPD-Link)

n RSDS dual bus output (8-bit/6-bit)

n Drives RSDS column drivers up to 47.5 MHz clock

n Flexible RSDS data output mapping for Bottom or Top

n RTC (Response time compensation) function

n 2 Wired Serial EEPROM Interface support (RTC LUT)

n Interface with external frame memory

n Virtual 8-bit color depth in FRC/Dithering mode

n Supports Graphics Controllers with spread spectrum

n Supports external Spread Spectrum (SSCG)

n DE only mode

n CMOS circuitry operates from 3.0V–3.6V; 0˚C–70˚C

n 176 LQFP package with body size 24 mm x 24 mm x

(1280x768), HDTV I (1280x768), HDTV II (1366x768)

and HDTV - (1280x800)

mount

interface for lower EMI

1.4 mm, 0.5 mm pitch

PRELIMINARY

www.national.com

July 2004

Related parts for FPD87352CXAVV/NOPB

FPD87352CXAVV/NOPB Summary of contents

Page 1

... The dual 13/10 pair differential bus conveys up to 24-bit color data for XGA, WXGA and HDTV panels. RSDS ™ trademark of National Semiconductor Corporation. © 2004 National Semiconductor Corporation Outputs Including RTC (Response Features n Input frequency range from 30 MHz to 95 MHz ™ ...

Page 2

System Diagram www.national.com FIGURE 1. Block Diagram of the LCD Module 2 20116201 ...

Page 3

Block Diagram Function Description FPD-LINK RECEIVER The LVDS based FPD-Link Receiver receives input video data and control timing. Four LVDS channels plus clock provide 24-bit color. RESETN initializes the chip with the default register values for the LUT values from ...

Page 4

Function Description VERTICAL & HORIZONTAL LCD TIMING CONTROL This function block generates the TTL(CMOS) level signal for the interface of column drivers and row drivers in the LCD www.national.com system. All signals are synchronized by RSF/BCKP/N which (Continued) is RSDS ...

Page 5

... BANNED SUBSTANCE COMPLIANCE National Semiconductor certifies that the products and packing materials meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2. ...

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