ICS853111BYLF IDT, Integrated Device Technology Inc, ICS853111BYLF Datasheet - Page 12

• Manufacturer Part Number: ICS853111BYLF
• Description: IC FANOUT BUFF LVPECL/ECL 32TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Fanout Buffer (Distribution), Multiplexerr

Specifications of ICS853111BYLF

• Number Of Circuits: 1
• Ratio - Input:output: 2:10
• Differential - Input:output: Yes/Yes
• Input: CML, LVDS, LVPECL, SSTL
• Output: ECL, LVPECL
• Frequency - Max: 3GHz
• Voltage - Supply: 2.375 V ~ 3.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFP, 32-VQFP
• Frequency-max: 3GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1165; 853111BYLF

S
This application note provides general design guide using
ICS853111B LVPECL buffer. Figure 6 shows a schematic example
of the ICS853111B LVPECL clock buffer. In this example, the
T
The expose metal pad provides heat transfer from the device to
the P.C. board. The expose metal pad is ground pad connected
to ground plane through thermal via. The exposed pad on the
device to the exposed metal pad on the PCB is contacted through
IDT
HERMAL
CHEMATIC
ICS853111B
LOW SKEW, 1-TO-10, DIFFERENTIAL-TO-2.5V, 3.3V LVPECL/ECL FANOUT BUFFER
™
/ ICS
™
1-TO-10, LVPECL/ECL FANOUT BUFFER
R
E
ELEASE
XAMPLE
VCC
3.3V LVPECL
SIGNAL
TRACE
SOLDER M ASK
VCC=3.3V
P
(U1-9)
ATH
F
Zo = 50 Ohm
Zo = 50 Ohm
0.1uF
C1
IGURE
F
GROUND PLANE
IGURE
C8 (Option)
VCC
6. E
0.1u
(U1-16)
R9
7. P.C. B
50
0.1uF
XAMPLE
C2
(U1-25)
OARD FOR
R10
50
R11
50
ICS853111B LVPECL C
0.1uF
C3
(U1-32)
R4
1K
0.1uF
E
C4
XPOSED
THERM AL VIA
(U1-1)
1
2
3
4
5
6
7
8
VCC
0.1uF
VCC
CLK_SEL
PCLK0
nPCLK0
VBB
PCLK1
nPCLK1
VEE
C5
12
P
AD
input is driven by an LVPECL driver. CLK_SEL is set at logic high
to select PCLK0/nPCLK0 input.
solder as shown in Figure 7. For further information, please refer
to the Application Note on Surface Mount Assembly of Amkor’s
Thermally /Electrically Enhance Leadframe Base Package, Amkor
Technology.
T
EXPOSED PAD
HERMAL
LOCK
VCC
O
R
UTPUT
ELEASE
nQ3
nQ4
nQ5
nQ6
ICS853111
Q3
Q4
Q5
Q6
Zo = 50
Zo = 50
Zo = 50
Zo = 50
C6 (Option)
C7 (Option)
24
23
22
21
20
19
18
17
B
U1
Expose Metal Pad
(GROUND PAD)
P
UFFER
ATH
0.1u
0.1u
ICS853111BY REV. B SEPTEMBER 5, 2007
E
SOLDER
S
XAMPLE
R2
50
R8
50
CHEMATIC
R1
50
R3
50
R7
50
R13
50
+
-
+
-
SIGNAL
TRACE