ICS853111BYLF IDT, Integrated Device Technology Inc, ICS853111BYLF Datasheet - Page 13

IC FANOUT BUFF LVPECL/ECL 32TQFP

ICS853111BYLF

Manufacturer Part Number
ICS853111BYLF
Description
IC FANOUT BUFF LVPECL/ECL 32TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
HiPerClockS™r
Type
Fanout Buffer (Distribution), Multiplexerr
Datasheet

Specifications of ICS853111BYLF

Number Of Circuits
1
Ratio - Input:output
2:10
Differential - Input:output
Yes/Yes
Input
CML, LVDS, LVPECL, SSTL
Output
ECL, LVPECL
Frequency - Max
3GHz
Voltage - Supply
2.375 V ~ 3.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-TQFP, 32-VQFP
Frequency-max
3GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
800-1165
853111BYLF

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Quantity
Price
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Manufacturer:
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This section provides information on power dissipation and junction temperature for the ICS853111B.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS853111B is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 43.8°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
T
IDT
ABLE
ICS853111B
LOW SKEW, 1-TO-10, DIFFERENTIAL-TO-2.5V, 3.3V LVPECL/ECL FANOUT BUFFER
/ ICS
6. T
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 10 * 30.94mW = 309.4mW
Total Power
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
70°C + 0.765W * 43.8°C/W = 118.5°C. This is below the limit of 125°C.
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
JA
A
1-TO-10, LVPECL/ECL FANOUT BUFFER
= Ambient Temperature
HERMAL
= junction-to-Ambient Thermal Resistance
R
MAX
_MAX
ESISTANCE
= V
MAX
(3.8V, with all outputs switching) = 456mW + 309.4mW = 765.4mW
= 30.94mW/Loaded Output pair
CC_MAX
θ θ θ θ θ
* I
JA
EE_MAX
FOR
θ θ θ θ θ
JA
= 3.8V * 120mA = 456mW
32-
by Velocity (Linear Feet per Minute)
CC
PIN
P
= 3.8V, which gives worst case results.
TQFP, E-P
OWER
JA
* Pd_total + T
AD
C
F
ONSIDERATIONS
ORCED
A
13
69.3°C/W
49.5°C/W
C
0
ONVECTION
TM
devices is 125°C.
57.8°C/W
43.8°C/W
200
ICS853111BY REV. B SEPTEMBER 5, 2007
JA
must be used. Assuming a
52.1°C/W
41.3°C/W
500

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