ICS84330AV-02LF IDT, Integrated Device Technology Inc, ICS84330AV-02LF Datasheet
ICS84330AV-02LF
Specifications of ICS84330AV-02LF
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ICS84330AV-02LF Summary of contents
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G D ENERAL ESCRIPTION ...
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F D UNCTIONAL ESCRIPTION NOTE: The functional description that follows describes op- eration using a 16MHz crystal. Valid PLL loop divider values for different crystal or input frequencies are defined in the In- put Frequency Characteristics, Table 6, NOTE 1. ...
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ABLE IN ESCRIPTIONS ...
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T 3A ABLE ARALLEL AND ERIAL ODE ...
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BSOLUTE AXIMUM ATINGS Supply Voltage Inputs Outputs Continuous Current Surge Current Package Thermal Impedance, θ JA Storage Temperature, T STG T 4A ABLE OWER UPPLY HARACTERISTICS S ...
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ABLE RYSTAL HARACTERISTICS ...
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P ARAMETER 2V V CC, V CCA LVPECL V EE -1.3V ± 0.165V 3. UTPUT OAD EST IRCUIT nFOUT FOUT t cycle jit(cc) = cycle n – 1000 Cycles ...
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OWER UPPLY ILTERING ECHNIQUES As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS84330-02 provides separate power supplies to isolate any high switching noise from the outputs to ...
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LVCMOS XTAL I TO NTERFACE The XTAL_IN input can accept single ended LVCMOS signal through an AC couple capacitor. A general interface diagram is shown in Figure 4. The XTAL_OUT input can be left floating. The edge rate can be ...
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L G AYOUT UIDELINE The schematic of the ICS84330-02 layout example used in this layout guideline is shown in Figure 6A. The ICS84330-02 recommended PCB board layout for this example is shown in Figure 6B. This layout example is used ...
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The following component footprints are used in this layout example: All the resistors and capacitors are size 0603 OWER AND ROUNDING Place the decoupling capacitors C3 and C4, as close as pos- sible to the power pins. If ...
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J R FREF_EXT S ITTER EDUCTION FOR If the FREF_EXT input is driven by a 3.3V LVCMOS driver, the jitter performance can be improved by reducing the amplitude swing and slowing down the edge rate. Figure 7A shows an amplitude ...
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This section provides information on power dissipation and junction temperature for the ICS84330-02. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS84330-02 is the sum of the core power plus the power ...
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Calculations and Equations. The purpose of this section is to derive the power dissipated into the load. LVPECL output driver circuit and termination are shown in the Figure 8. F IGURE T o calculate worst case power dissipation into ...
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PLCC T ABLE VS IR LOW JA Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs RANSISTOR ...
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ACKAGE UTLINE UFFIX FOR T ABLE Reference Document: JEDEC Publication 95, MS-018 84330AV-02 700MH D IFFERENTIAL PLCC EAD 11 ACKAGE IMENSIONS ...
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T 12 ABLE RDERING NFORMATION ...
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84330AV-02 700MH D IFFERENTIAL ...
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We’ve Got Your Timing Solution. 6024 Silver Creek Valley Road San Jose, CA 95138 © 2010 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, the IDT logo, ICS and HiPerClockS are trademarks of ...