SI4134T-BM Silicon Laboratories Inc, SI4134T-BM Datasheet - Page 31

IC RF SYNTH DUAL W/DCXO 32MLP

SI4134T-BM

Manufacturer Part Number
SI4134T-BM
Description
IC RF SYNTH DUAL W/DCXO 32MLP
Manufacturer
Silicon Laboratories Inc
Series
Aero™+r
Type
Frequency Synthesizerr
Datasheet

Specifications of SI4134T-BM

Pll
Yes
Input
Clock
Output
Clock
Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
No/Yes
Frequency - Max
1.99GHz
Divider/multiplier
Yes/No
Voltage - Supply
2.7 V ~ 3 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Frequency-max
1.99GHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Register 10h. Revision/Read (Si4201)
Note: Registers on the Si4201 can be read by writing this register with the address of the register to be read.
Register 11h. Configuration (Si4201)
Name
Name
Bit
Bit
17:14
13:11
17:8
7:0
3:1
Bit
Bit
10
9
8
7
6
5
4
0
D17 D16 D15 D14 D13 D12 D11 D10
D17 D16 D15 D14 D13 D12 D11 D10
0
0
0
0
DPDS[2:0]
REV1[7:0]
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
0
0
Name
Name
XPD1
XSEL
CSEL
0
0
0
DPDS[2:0]
0
Read as zero.
Si4201 Revision (read only).
00h = Rev A.
01h = Rev B.
02h = Rev C (latest version).
Program to zero.
Data Path Delayed Start.
111= Use for GSM 850 and GSM 900 bands.
011= Use for DCS 1800 and PCS 1900 bands (default).
Note: Use the recommended setting for each band. Other settings reserved.
Reference Buffer Powerdown.
0 = Reference buffer automatically enabled (default).
1 = Reference buffer disabled.
Note: This bit should be set to 0 during normal operation. To achieve lowest
Program to one.
Reference Frequency Select.
0 = No divider. XIN = 13 MHz (default).
1 = Divide XIN by 2. XIN = 26 MHz.
Note: The internal clock should always be 13 MHz.
Program to zero.
Program to one.
Program to zero.
Program to one.
Program to zero.
Digital IIR Coefficient Select.
0 = High selectivity filter (default).
1 = Low selectivity filter.
0
Si4201 powerdown current (I
bit in Register 12h must also be set appropriately
XPD1
0
Rev. 1.2
D9
D9
0
1
XSEL
D8
D8
0
D7
D7
0
Function
Function
PDN1
D6
D6
1
), this bit should be set to 1. The XBUF
D5
D5
0
D4
D4
REV1[7:0]
1
D3
D3
0
D2
D2
0
Aero+
D1
D1
0
CSEL
D0
D0
31

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