LM3905N National Semiconductor, LM3905N Datasheet - Page 6

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LM3905N

Manufacturer Part Number
LM3905N
Description
IC TIMER PRECISION 8-DIP
Manufacturer
National Semiconductor
Datasheet

Specifications of LM3905N

Voltage - Supply
*
Current - Supply
2.5mA
Operating Temperature
*
Package / Case
*
Frequency
*
Count
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*LM3905N
LM3905

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Pin Function Description
trollers Typical temperature drift of the reference is less
than 0 01% C
The trigger terminal is used to start a timing cycle (see
functional diagram) Initially Q1 is saturated C
charged and the latching buffer output (V1) is latched high
A trigger pulse unlatches the buffer V1 goes low and turns
Q1 off The timing capacitor C
will begin to charge When the voltage at the R C terminal
reaches the 2 0V threshold of the comparator the compara-
tor toggles latching the buffer output (V1) in the high state
This turns on Q1 discharges the capacitor C
is ready to begin again
If the trigger is held high as the timing period ends the
comparator will toggle and V1 will go high exactly as before
However V1 will not be latched and the capacitor will not
discharge until the trigger again goes low When the trigger
goes low V1 remains high but is now latched
Trigger threshold is typically 1 6V at 25 C and has a tem-
perature dependence of
the trigger source is typically 20
600
series resistor R5 For negative input trigger voltages the
only current drawn is leakage in the nA region The trigger
can be driven from supplies as high as
device supply voltage is only 5V
The R C pin is tied to the non-inverting side of the compara-
tor and to the collector of Q1 Timing ends when the voltage
on this pin reaches 2 0V (1 RC time constant referenced to
the 3 15V regulator) Q1 turns on only if the trigger voltage
has dropped below threshold In comparator or regulator
applications of the timer the trigger is held permanently
high and the R C pin acts just like the input to an ordinary
comparator The maximum voltages which can be applied to
this pin are
typically 300 pA when the voltage is negative with respect to
the V
leakage levels In the boosted mode input current is typical-
ly 30 nA Gain of the comparator is very high 200 000 or
more depending on the state of the logic reverse pin and
the connection of the output transistor
The ground pin of the LM122 need not necessarily be tied
to system ground It can be connected to any positive or
negative voltage as long as the supply is negative with re-
spect to the V
for the input trigger if the trigger voltage is referred to sys-
tem ground This can be done by capacitive coupling or by
actual resistive or active level shifting One point must be
kept in mind the emitter output must not be held above the
ground terminal with a low source impedance This could
occur for instance if the emitter were grounded when the
ground pin of the LM122 was tied to a negative supply
The terminal labled V
tor and to a voltage divider between V
divider voltage is set at 63 2% of V
ground exactly one RC time constant The impedance of
the divider is increased to about 30k with a series resistor to
ADJ
A at 30V then leveling off due to FET action of the
terminal For higher voltages the current drops to
a
5 5V and
a
terminal Level shifting may be necessary
ADJ
b
b
is tied to one side of the compara-
0 7V Current from the R C pin is
5 0 mV C Current drawn from
t
connected from R C to GND
A at threshold rising to
REF
REF
g
(Continued)
and ground The
40V even when
with respect to
t
and the cycle
t
is dis-
6
present a minimum load on external signals tied to V
This resistor is a pinched type with a typical variation in
nominal value of
this reason external signals (typically a pot between V
and ground) connected to V
sistance as low as possible For small changes in V
to several k
less should be maintained This can be accomplished with a
1k pot since the maximum impedance from the wiper is
250
voltage should be limited to
limited to
nals because even small values of capacitors contain
enough energy to degrade the input stage if the capacitor is
driven with a large fast slewing signal The V
used to abort the timing cycle Grounding this pin during the
timing period causes the timer to react just as if the capaci-
tor voltage had reached its normal RC trigger point the
capacitor discharges and the output charges state An ex-
ception to this occurs if the trigger pin is held high when the
V
state but the capacitor does not discharge
If the trigger drops while V
will occur immediately and the cycle will be over If the trig-
ger is still high when V
may not change state depending on the voltage across the
timing capacitor For voltages below 2 0V across the timing
capacitor the output will change state immediately then
once more as the voltage rises past 2 0V For voltages
above 2 0V no change will occur in the output This pin is
not available on the LM2905 LM3905
In noisy environments or in comparator-type applications a
bypass capacitor on the V
eliminate spurious outputs because it is high impedance
point The size of the cap will depend on the frequency and
energy content of the noise A 0 1 F will generally suffice
for spike suppression but several
timer is subjected to high level 60 Hz EMI
The emitter and the collector outputs of the timer can be
treated just as if they were an ordinary transistor with 40V
minimum collector-emitter breakdown voltage Normally the
emitter is tied to the ground pin and the signal is taken
from the collector or the collector is tied to V
signal is taken from the emitter Variations on these basic
connections are possible The collector can be tied to any
positive voltage up to 40V when the signal is taken from the
emitter However the emitter will not be pulled higher than
the supply voltage on the V
to a voltage less than the V
ter should not be connected to a low impedance load other
than that to which the ground pin is tied The transistor has
built-in current limiting with a typical knee current of 120 mA
Temporary short circuits are allowed even with collector-
emitter voltages up to 40V The power x time product how-
ever must not exceed 15 watt-seconds for power levels
above the maximum rating of the package A short to 30V
ADJ
pin is grounded In this case the output changes
If a voltage is forced on V
g
1 0 mA This includes capacitively coupled sig-
is all right but for large variations 250
b
50%
ADJ
a
ADJ
ADJ
100% and a TC of 0 7% C For
a
a
is released the output may or
ADJ
b
pin Connecting the collector
voltage is allowed The emit-
is being held low discharge
0 5 and
terminal may be needed to
should have a source re-
ADJ
F may be used if the
from a hard source
a
5 0V or current
ADJ
pin may be
a
ADJ
and the
ADJ
REF
up
or

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