AD7699BCPZ Analog Devices Inc, AD7699BCPZ Datasheet - Page 13

• Manufacturer Part Number: AD7699BCPZ
• Description: IC ADC 8CH 16BIT 500KSPS 20LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD7699BCPZ

• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Bits: 16
• Sampling Rate (per Second): 500k
• Number Of Converters: 1
• Power Dissipation (max): 32mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-VFQFN, CSP Exposed Pad
• Resolution (bits): 16bit
• Sampling Rate: 500kSPS
• Input Channel Type: Pseudo Differential, Single Ended
• Supply Voltage Range - Analog: 4.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

THEORY OF OPERATION
OVERVIEW
The AD7699 is an 8-channel, 16-bit, charge redistribution
successive approximation register (SAR) analog-to-digital
converter (ADC). It is capable of converting 500,000 samples
per second (500 kSPS) and power down between conversions.
For example, when operating with an external reference at
1 kSPS, it consumes 52 µW typically, ideal for battery-powered
applications.
The AD7699 contains all of the components for use in a
multichannel, low power data acquisition system, including
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These components are configured through an SPI-compatible,
14-bit register. Conversion results, also SPI compatible, can be
read after or during conversions with the option for reading
back the configuration.
The AD7699 provides the user with an on-chip track-and-hold
and does not exhibit pipeline delay or latency.
The AD7699 is specified from 4.5 V to 5.5 V and can be interfaced
to any 1.8 V to 5 V digital logic family. It is housed in a 20-lead,
4 mm × 4 mm LFCSP that combines space savings and allows
flexible configurations and is also pin-for-pin compatible with
the 16-bit
16-bit SAR ADC with no missing codes
8-channel, low crosstalk multiplexer
Internal low drift reference and buffer
Temperature sensor
Selectable one-pole filter
Channel sequencer
INx– OR
COM
INx+
GND
REF
AD7682
and
AD7689,
and the 14-bit AD7949.
32,768C
32,768C
16,384C
16,384C
MSB
MSB
Figure 25. ADC Simplified Schematic
4C
4C
Rev. 0 | Page 13 of 28
2C
2C
CONVERTER OPERATION
The AD7699 is a successive approximation ADC based on a
charge redistribution DAC. Figure 25 shows the simplified
schematic of the ADC. The capacitive DAC consists of two
identical arrays of 16 binary-weighted capacitors, which are
connected to the two comparator inputs.
During the acquisition phase, terminals of the array tied to the
comparator input are connected to GND via SW+ and SW−. All
independent switches are connected to the analog inputs.
Thus, the capacitor arrays are used as sampling capacitors and
acquire the analog signal on the INx+ and INx− (or COM)
inputs. When the acquisition phase is complete and the CNV
input goes high, a conversion phase is initiated. When the
conversion phase begins, SW+ and SW− are opened first. The
two capacitor arrays are then disconnected from the inputs and
connected to the GND input. Therefore, the differential voltage
between the INx+ and INx− (or COM) inputs captured at the
end of the acquisition phase is applied to the comparator inputs,
causing the comparator to become unbalanced. By switching
each element of the capacitor array between GND and REF, the
comparator input varies by binary-weighted voltage steps
(V
switches, starting with the MSB, to bring the comparator back
into a balanced condition. After the completion of this process,
the part returns to the acquisition phase, and the control logic
generates the ADC output code and a busy signal indicator.
Because the AD7699 has an on-board conversion clock, the
serial clock, SCK, is not required for the conversion process.
C
C
REF
/2, V
C
C
REF
LSB
LSB
/4, ... V
SW+
SW–
REF
COMP
/32,768). The control logic toggles these
SWITCHES CONTROL
CONTROL
LOGIC
CNV
BUSY
OUTPUT CODE
AD7699