ADC122S051CIMM/NOPB National Semiconductor, ADC122S051CIMM/NOPB Datasheet - Page 2

• Manufacturer Part Number: ADC122S051CIMM/NOPB
• Description: IC ADC 12BIT 2CHAN 500KSPS 8MSOP
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of ADC122S051CIMM/NOPB

• Number Of Bits: 12
• Sampling Rate (per Second): 500k
• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 10mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
• Number Of Elements: 1
• Resolution: 12Bit
• Architecture: SAR
• Sample Rate: 500KSPS
• Input Polarity: Unipolar
• Input Type: Voltage
• Rated Input Volt: 5.25V
• Differential Input: No
• Power Supply Requirement: Single
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 5.25V
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Differential Linearity Error: -1LSB/1.3LSB
• Integral Nonlinearity Error: ±1.1LSB
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 8
• Package Type: MSOP
• Input Signal Type: Single-Ended
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADC122S051CIMM; ADC122S051CIMMTR

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ANALOG I/O
DIGITAL I/O
POWER SUPPLY
Block Diagram
Pin Descriptions and Equivalent Circuits
Pin No.
5,4
8
7
6
1
2
3
IN1 and IN2
Symbol
DOUT
SCLK
GND
DIN
CS
V
A
Analog inputs. These signals can range from 0V to V
Digital clock input. This clock directly controls the conversion and readout processes.
Digital data output. The output samples are clocked out of this pin on falling edges of the
SCLK pin.
Digital data input. The ADC122S051's Control Register is loaded through this pin on rising
edges of the SCLK pin.
Chip select. On the falling edge of CS, a conversion process begins. Conversions
continue as long as CS is held low.
Positive supply pin. This pin should be connected to a quiet +2.7V to +5.25V source and
bypassed to GND with a 1 µF capacitor and a 0.1 µF monolithic capacitor located within
1 cm of the power pin.
The ground return for the die.
2
Description
20106407
A
.