MAX11102ATB+T Maxim Integrated Products, MAX11102ATB+T Datasheet - Page 4

• Manufacturer Part Number: MAX11102ATB+T
• Description: IC ADC 12BIT SPI/SRL 10TDFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX11102ATB+T

• Number Of Bits: 12
• Sampling Rate (per Second): 2M
• Data Interface: MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 1.95W
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 10-WFDFN Exposed Pad
• Conversion Rate: 2 MSPs
• Resolution: 12 bit
• Interface Type: Serial (3-Wire, SPI, QSPI, Microwire)
• Snr: 73 dB
• Voltage Reference: 1 V
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.2 V
• Maximum Power Dissipation: 1951 mW
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Input Voltage: 2.2 V to 3.6 V
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MAX11102ATB+TTR

2Msps/3Msps, Low-Power,
Serial 12-/10-/8-Bit ADCs
ELECTRICAL CHARACTERISTICS (MAX11102/MAX11103) (continued)
(V
50% duty cycle, 3Msps. C
ELECTRICAL CHARACTERISTICS (MAX11105)
(V
values are at T
4
POWER SUPPLY
Positive Supply Voltage
Digital I/O Supply Voltage
Positive Supply Current
(Full-Power Mode)
Positive Supply Current (Full-
Power Mode), No Clock
Power-Down Current
Line Rejection
TIMING CHARACTERISTICS (Note 1)
Quiet Time
CS Pulse Width
CS Fall to SCLK Setup
CS Falling Until DOUT High-
Impedance Disabled
Data Access Time After SCLK
Falling Edge
SCLK Pulse Width Low
SCLK Pulse Width High
Data Hold Time From SCLK
Falling Edge
SCLK Falling Until DOUT High-
Impedance
Power-Up Time
DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
Total Unadjusted Error
DYNAMIC PERFORMANCE
Signal-to-Noise and Distortion
Signal-to-Noise Ratio
DD
DD
______________________________________________________________________________________
= 2.2V to 3.6V, f
= 2.2V to 3.6V, V
PARAMETER
PARAMETER
A
= +25NC.)
SCLK
REF
DOUT
= V
= 32MHz, 50% duty cycle, 2Msps, C
DD
= 10pF, T
, V
OVDD
SYMBOL
SYMBOL
V
SINAD
I
OVDD
I
I
DNL
SNR
V
OVDD
TUE
VDD
VDD
INL
I
OE
GE
t
PD
t
t
t
t
t
t
t
t
DD
Q
1
2
3
4
5
6
7
8
= V
A
= -40NC to +125NC, unless otherwise noted. Typical values are at T
DD
. MAX11102: f
MAX11103, V
MAX11102, V
MAX11103, V
MAX11102, V
MAX11103
MAX11102
Leakage only
V
(Note 2)
Figure 2, V
Figure 2, V
Percentage of clock period
Percentage of clock period
Figure 3
Figure 4 (Note 2)
Conversion cycle
No missing codes
Excluding offset and reference errors
f
f
AIN
AIN
DD
= 500kHz
= 500kHz
= +2.2V to +3.6V, V
OVDD
OVDD
SCLK
AIN_
AIN_
AIN_
AIN_
DOUT
CONDITIONS
CONDITIONS
= 2.2V - 3.6V
= 1.5V - 2.2V
= V
= V
= V
= V
= 32MHz, 50% duty cycle, 2Msps. MAX11103: f
= 10pF, T
GND
GND
GND
GND
REF
= 2.2V
A
= -40NC to +125NC, unless otherwise noted. Typical
70.5
MIN
MIN
2.2
1.5
2.5
10
40
40
12
70
4
5
1
5
Q0.3
Q1.5
72.5
TYP
1.98
1.48
TYP
1.3
0.7
Q1
73
A
= +25NC.)
MAX
MAX
0.33
0.22
16.5
V
3.6
3.3
2.6
Q1
Q1
Q3
Q3
10
15
60
60
14
DD
SCLK
1
= 48MHz,
UNITS
UNITS
LSB/V
Cycle
LSB
LSB
LSB
LSB
LSB
Bits
mA
mA
dB
dB
FA
ns
ns
ns
ns
ns
ns
ns
%
%
V
V