LTC2439-1IGN Linear Technology, LTC2439-1IGN Datasheet
LTC2439-1IGN
Specifications of LTC2439-1IGN
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LTC2439-1IGN Summary of contents
Page 1
... Through a single pin, the REF LTC2439-1 can be configured for better than 87dB differ- ential mode rejection at 50Hz and 60Hz ±2 can be driven by an external oscillator for a user-defined rejec- tion frequency. The internal oscillator requires no external frequency setting components ...
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... CC + 0.3V) CC ORDER PART NUMBER LTC2439-1CGN LTC2439-1IGN Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: Consult LTC Marketing for parts specified with wider operating temperature ranges. The ● ...
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... 5.5V, REF = 5V CC – 5.5V, REF = GND CC DC 1Hz f = 15,3600Hz S 2.7V ≤ V ≤ 5.5V CC Channel at V and GND CC LTC2439-1 MIN TYP MAX UNITS 0.20 0.20 µV 1 ● 130 140 ● 140 ● 87 ● 130 140 120 120 MIN TYP MAX ● ...
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... LTC2439 DIGITAL I PUTS A D DIGITAL OUTPUTS operating temperature range, otherwise specifications are at T SYMBOL PARAMETER V High Level Input Voltage IH CS SDI O V Low Level Input Voltage IL CS SDI O V High Level Input Voltage IH SCK V Low Level Input Voltage IL SCK I Digital Input Current ...
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... Note 14: The low sleep mode current is valid only when CS is high. Note 15: These parameters are guaranteed by design over the full supply and temperature range. Automated testing procedures are limited by the LSB Step Size (V LTC2439-1 MIN TYP MAX ● 2.56 2000 ● ...
Page 6
... LTC2439 CTIO S CH0 to CH15 (Pin 21 to Pin 28 and Pin 1 to Pin 8): Analog Inputs. May be programmed for single-ended or differen- tial mode. V (Pin 9): Positive Supply Voltage. Bypass to GND CC (Pin 15) with a 10µF tantalum capacitor in parallel with 0.1µF ceramic capacitor as close to the part as possible. ...
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... U APPLICATIO S I FOR ATIO CONVERTER OPERATION Converter Operation Cycle The LTC2439 multichannel, low power, delta-sigma analog-to-digital converter with an easy-to-use 4-wire se- rial interface (see Figure 1). Its operation is made up of three states. The converter operating cycle begins with the con- version, followed by the low power sleep state and ends with the data input/output (see Figure 2) ...
Page 8
... In order to maintain compatibility with 24-/32-bit data transfers possible to clock the LTC2439-1 with additional serial clock pulses. This results in additional data bits which are always logic HIGH. Through timing control of the CS and SCK pins, the ...
Page 9
... LTC2436-1 achieves a minimum of 87dB rejection over the range 49Hz to 61.2Hz. Ease of Use The LTC2439-1 data output has no latency, filter settling delay or redundant data associated with the conversion cycle. There is a one-to-one correspondence between the conversion and the output data. Therefore, multiplexing multiple analog voltages is easy ...
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... LTC2439 APPLICATIO S I FOR ATIO maintain the parasitic capacitance of the connection be- tween these series resistors and the corresponding pins as low as possible; therefore, the resistors should be located as close as practical to the pins. In addition, series Table 1. Channel Selection MUX ADDRESS ODD/ SGL SIGN – ...
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... In the data input/output mode follow- ing the first conversion, a channel selection can be up- dated using an 8-bit word. The LTC2439-1 serial input data is clocked into the SDI pin on the rising edge of SCK (see Figure 3a). The input is composed of an 8-bit word with the first 3 bits acting as control bits and the remaining 5 bits as the channel address bits ...
Page 12
... Whenever an external clock is not present at the F . For differential input converter automatically activates its internal oscillator and enters the Internal Conversion Clock mode. The LTC2439-1 operation will not be disturbed if the change of conversion clock source occurs during the sleep state or during the data output state while the converter uses an external serial clock ...
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... EOSC In the Internal SCK mode of operation, the SCK pin is an output and the LTC2439-1 creates its own serial clock by dividing the internal conversion clock the External SCK mode of operation, the SCK pin is used as input. The Internal or External SCK mode is selected on power-up and then reselected every time a HIGH-to-LOW transition is de- tected at the CS pin ...
Page 14
... In addition, the CS signal can be used to trigger a new conversion cycle before the entire serial data transfer has been completed. The LTC2439-1 will abort any serial data transfer in progress and start a new conversion cycle anytime a LOW-to-HIGH transition is detected at the CS pin after the converter has entered the data input/output state (i ...
Page 15
... EOC may be used as an interrupt to an external controller indicating the conversion result is ready. EOC = 1 while the conversion is in progress and EOC = 0 once the conversion ends. On the falling edge of EOC, the conversion result is loaded into an internal static LTC2439-1 = EXTERNAL CLOCK SOURCE = INTERNAL OSC/SIMULTANEOUS 50Hz/60Hz REJECTION BIT 11 ...
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... COM GND BIT 18 BIT 17 BIT 16 BIT 15 BIT 14 EOC “O” SIG MSB Hi-Z ODD/ (1) (0) EN SGL SIGN 2.7V TO 5.5V 1µ LTC2439 REFERENCE REF SDI VOLTAGE 12 18 – 0. REF SCK CC 21 CH0 • • • • • • CH7 SDO 1 16 ...
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... BIT 12 SIG MSB ODD/ (0) EN SGL A2 A1 SIGN DATA OUTPUT Figure 9. Internal Serial Clock, Single Cycle Operation LTC2439-1 EOCtest is 23µs if the device is using its internal EOCtest = logic LOW or HIGH driven then t EOSC . pulled HIGH before time t , the first rising EOCtest ...
Page 18
... CS. This can be avoided by adding an external 10k pull-up resistor to the SCK pin or by never pulling CS HIGH when SCK is LOW. Whenever SCK is LOW, the LTC2439-1’s internal pull-up at pin SCK is disabled. Normally, SCK is not externally driven if the device is in the internal SCK timing mode. ...
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... SDO goes HIGH (EOC = 1) indicating a new conversion is in progress. SCK remains HIGH during the conversion. PRESERVING THE CONVERTER ACCURACY The LTC2439-1 is designed to reduce as much as possible the conversion result sensitivity to device decoupling, PCB layout, antialiasing circuits, line fre- quency perturbations and so on. Nevertheless, in order to preserve the accuracy capability of this part, some simple precautions are desirable ...
Page 20
... Parallel termination near the LTC2439-1 pin will eliminate this problem but will increase the driver power dissipation. A series resistor between 27Ω and 56Ω placed near the driver or near the LTC2439-1 pin will also eliminate this problem without additional power dissipation. The actual resistor value depends upon the trace impedance and connection topology ...
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... V ⎜ REFCM ⎝ − ⎛ ⎜ INCM 24391 F11 ⎝ 555 LOW) Figure 12. LTC2439-1 Equivalent Analog Input Circuit LTC2439-1 is used, the sampling period is 2/f EOSC + – and IN pins as a result of the + − INCM REFCM • − + − INCM REFCM • ...
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... C are unavoidably present as parasitics IN of input multiplexers, wires, connectors or sensors, the LTC2439-1 can maintain its accuracy while operating with relative large values of source resistance as shown in Figures 14 and 15. These measured results may be slightly different from the first order approximation suggested ...
Page 23
... U + – will are shown IN Figure 16. +FS Error vs R capacitor IN = LOW O –7 Figure 17. –FS Error – and IN pins when Figure 18. Offset Error vs Common Mode Voltage (V Imbalance (∆R Large C + and LTC2439 1µF, 10µF REF = 5V IN – REF = GND 3.75V – 1.25V F = GND 25° ...
Page 24
... This current, nominally 1nA (±10nA max), results in a small offset shift. A 15k source resistance will create a 0LSB typical and 1LSB maximum offset voltage. Reference Current In a similar fashion, the LTC2439-1 samples the differen- + – tial reference pins REF and REF ...
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... REF and REF output phases which are controlled by the user and which can be made insignificantly short. When operated with an external conversion clock (F oscillator), the LTC2439-1 output data rate can be in- + creased as desired. The duration of the conversion phase and is 20510/f haves as if the internal oscillator is used with simultaneous 50Hz/60Hz ...
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... Reducing the reference voltage is func- tionally equivalent to amplifying the input signal, however no amplifier is required. The LTC2439-1 has a 76µV LSB when used with a 5V reference, however the thermal noise of the inputs is 1µV RMS + – ...
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... GN Package 28-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .015 ± .004 × 45° (0.38 ± 0.10) .0075 – .0098 0° – 8° TYP (0.191 – 0.249) .016 – .050 (0.406 – 1.270) LTC2439 85°C A 120 T = 25°C A 180 ...
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... No Latency ∆Σ ADC in MSOP LTC2411 24-Bit, Simultaneous 50Hz/60Hz Rejection ∆Σ ADC LTC2411-1 LTC2412 2-Channel, 24-Bit, Pin Compatible with LTC2439-1 24-Bit, No Latency ∆Σ ADC LTC2413 8-/16-Channel, 24-Bit No Latency ∆Σ ADC LTC2414/LTC2418 24-Bit, No Latency ∆Σ ADC with 15Hz Output Rate LTC2415 20-Bit, No Latency ∆ ...