LTC1402IGN Linear Technology, LTC1402IGN Datasheet - Page 15

• Manufacturer Part Number: LTC1402IGN
• Description: IC ADC 12BIT 2.2MSPS SHDN 16SSOP
• Manufacturer: Linear Technology

Specifications of LTC1402IGN

• Number Of Bits: 12
• Sampling Rate (per Second): 2.2M
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 150mW
• Voltage Supply Source: Analog and Digital, Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SSOP (0.150", 3.90mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

APPLICATIONS
0000 0000 0000 and 0000 0000 0001. For full-scale ad-
justment in Figures 10a and 10b, apply an input voltage of
2.0465V (FS – 1.5LSBs) to A
output code flickers between 1111 1111 1110 and 1111
1111 1111.
BOARD LAYOUT AND BYPASSING
Wire wrap boards are not recommended for high resolu-
tion and/or high speed A/D converters. To obtain the best
performance from the LTC1402, a printed circuit board
with ground plane is required. Layout for the printed
circuit board should ensure that digital and analog signal
lines are separated as much as possible. In particular, care
should be taken not to run any digital track alongside an
analog signal track.
An analog ground plane separate from the logic system
ground should be established under and around the ADC.
Pin 2 (AGND1), Pin 6 (AGND2), Pin 13 (DGND) and all
other analog grounds should be connected directly to an
analog ground plane. Pin 9 (OGND) should be connected
near Pin13 (DGND), where the analog ground plane ties to
the logic system ground. The V
the DV
this analog ground plane, see Figure 11. No other digital
grounds should be connected to this analog ground plane.
Low impedance analog and digital power supply common
returns are essential to low noise operation of the ADC and
the foil width for these tracks should be as wide as
possible. The traces connecting the pins and bypass
capacitors must be kept short and should be made as wide
as possible.
DD
bypass capacitor should also be connected to
CIRCUITRY
ANALOG
INPUT
U
+
–
3
INFORMATION
U
A
IN
4
+
A
IN
IN
–
+
REF
V
and adjust R5 until the
REF
5
W
bypass capacitor and
10 F
Figure 11. Power Supply Grounding Practice
AGND2
6
ANALOG GROUND PLANE
U
V
SS
14
10 F
LTC1402
AGND1
2
The LTC1402 has differential inputs to minimize noise
coupling. Common mode noise on the A
will be rejected by the input CMRR. The A
used as a ground sense for the A
hold and convert the difference voltage between A
A
kept as short as possible. In applications where this is not
possible, the A
side to cancel noise coupling.
SUPPLY BYPASSING
High quality, low series resistance 10 F ceramic bypass
capacitors should be used at the V
Surface mount ceramic capacitors such as Murata
GRM235Y5V106Z016 provide excellent bypassing in a
small board space. Alternatively, 10 F tantalum capaci-
tors in parallel with 0.1 F ceramic capacitors can be used.
Bypass capacitors must be located as close to the pins as
possible. The traces connecting the pins and the bypass
capacitors must be kept short and should be made as wide
as possible.
POWER-DOWN MODES
Upon power-up, the LTC1402 is initialized to the active
state and is ready for conversion. The Nap and Sleep Mode
waveforms show the power-down modes for the LTC1402.
The SCK and CONV inputs control the power-down modes
(see Timing Diagrams). Two rising edges at CONV, with-
out any intervening rising edges at SCK, put the LTC1402
in Nap mode and the power drain drops from 90mW to
IN
–
. The leads to A
AV
DD
1
10 F
DV
DD
12
DGND
IN
13
+
and A
IN
OGND
+
OV
D
OUT
(Pin 3) and A
DD
IN
9
–
12
10
traces should be run side-by-
IN
SYSTEM
GROUND
3V TO 5V
+
SYSTEM
DIGITAL
input; the LTC1402 will
IN
1402 F11
DD
–
IN
(Pin 4) should be
LTC1402
+
IN
and V
and A
–
input can be
REF
IN
15
IN
–
leads
+
pins.
and