MAX1358BETL+ Maxim Integrated Products, MAX1358BETL+ Datasheet - Page 57

• Manufacturer Part Number: MAX1358BETL+
• Description: IC DAS 16BIT 40-TQFN
• Manufacturer: Maxim Integrated Products
• Type: Data Acquisition System (DAS)r

Specifications of MAX1358BETL+

• Resolution (bits): 16 b
• Sampling Rate (per Second): 21.84k
• Data Interface: Serial
• Voltage Supply Source: Analog and Digital
• Voltage - Supply: 1.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-TQFN Exposed Pad
• Number Of Converters: 2
• Resolution: 16 bit
• Interface Type: Serial (4-Wire, SPI, QSPI, Microwire)
• Voltage Reference: 1.25 V
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.8 V
• Maximum Power Dissipation: 2051.3 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Input Voltage: 1.8 V to 3.6 V
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The IMSK register determines which bits of the STATUS
register generate an interrupt on INT. The bits in this
register do not mask output signals routed to UPIO
since the output signals are masked by disabling that
UPIO function.
MLDVD: LDVD status bit mask. Set MLDVD = 0 to
enable the LDVD status bit interrupt to INT, and set
MLDVD = 1 to mask the LDVD status bit interrupt. The
power-on default value is 1.
MLCPD: LCP status bit mask. Set MLCPD = 0 to
enable the LCP status bit interrupt to INT, and set
MLCPD = 1 to mask the LCP status bit interrupt. The
power-on default value is 1.
MADO: ADO status bit mask. Set MADO = 0 to enable
the ADO status bit interrupt to INT, and set MADO = 1
to mask the ADO status bit interrupt. The power-on
default value is 1.
MSDC: SDC status bit mask. Set MSDC = 0 to enable
the SDC status bit interrupt to INT, and set MSDC = 1
to mask the SDC status bit interrupt. The power-on
default value is 1.
MCRDY: CRD status bit mask. Set MCRDY = 0 to
enable the CRDY status bit interrupt to INT, and set
This register is the power-supply and voltage monitors
control register.
LDOE: Low-dropout linear-regulator enable bit. Set
LDOE = 1 to enable the low-dropout linear regulator to
provide the internal source voltage for the charge
pump. Set LDOE = 0 to disable the LDO, allowing an
external drive to the charge-pump input through REG.
The power-on default value is 0.
CPE: Charge-pump enable bit. Set CPE = 1 to enable the
charge-pump doubler, and set CPE = 0 to disable the
charge-pump doubler. The power-on default value is 0.
LSDE: DV
enable bit. Set LSDE = 1 to enable the +1.8V (DV
low-supply-voltage detector, and set LSDE = 0 to
16-Bit, Data-Acquisition System with ADC, DACs,
IMSK Register (Power-On State: 1111 011X 1111 1111)
PS_VMONS Register (Power-On State: 0010 01XX)
UPIOs, RTC, Voltage Monitors, and Temp Sensor
MLDVD
MUPR4
LDOE
MSB
MSB
DD
low-supply voltage-detector power-
______________________________________________________________________________________
MLCPD
MUPR3
CPE
MUPR2
MADO
LSDE
MUPR1
MSDC
CPDE
DD
)
MCRDY = 1 to mask the CRDY status bit interrupt. The
power-on default value is 0.
MADD: ADD status bit mask. Set MADD = 0 to enable
the ADD status bit interrupt to INT, and set MADD = 1
to mask the ADD status bit interrupt. The power-on
default value is 1.
MALD: ALD status bit mask. Set MALD = 0 to enable
the ALD status bit interrupt to INT, and set MALD = 1 to
mask the ALD status bit interrupt. The power-on default
value is 1.
MUPR<4:1>: UPR<4:1> status bits mask. Set MUPR_ =
0 to enable the UPR_ status bit interrupt to INT, and set
MUPR_ = 1 to mask the UPR_ status bit interrupt. (_ =
1, 2, 3, or 4 and corresponds to the UPIO1, UPIO2,
UPIO3, or UPIO4 pins, respectively.) The power-on
default value is F hex.
MUPF<4:1>: UPF<4:1> status bits mask. Set MUPF_ =
0 to enable the UPF_ status bit interrupt to INT, and set
MUPF_ = 1 to mask the UPF_ status bit interrupt. (_ = 1,
2, 3, or 4 and corresponds to the UPIO1, UPIO2,
UPIO3, or UPIO4 pins, respectively.) The power-on
default value is F hex.
disable the DV
power-on default value is 1.
CPDE: CPOUT low-supply voltage-detector power-
enable bit. Set CPDE = 1 to enable the +2.7V CPOUT
low-supply voltage-detector comparator, and set CPDE
= 0 to disable the CPOUT low-supply voltage-detector
comparator. The power-on default value is 0.
HYSE: DV
enable bit. Set HYSE = 1 to set the hysteresis for the
+1.8V (DV
and set HYSE = 0 to set the hysteresis to +20mV. On initial
power-up, the hysteresis is +20mV and can be pro-
grammed to 200mV once RESET goes high. Once pro-
grammed to +200mV, the DV
nominally and the rising threshold is +2.0V nominally. The
MCRDY
MUPF4
HYSE
DD
DD
) low-supply-voltage detector to +200mV,
low-supply voltage-detector hysteresis-
DD
MUPF3
MADD
RSTE
low-supply-voltage detector. The
DD
MUPF2
MALD
falling threshold is +1.8V
X
MUPF1
LSB
LSB
X
X
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