IC DGTL POT 8BIT 1K 1CH 8-SOIC

AD8400AR1

Manufacturer Part NumberAD8400AR1
DescriptionIC DGTL POT 8BIT 1K 1CH 8-SOIC
ManufacturerAnalog Devices Inc
AD8400AR1 datasheet
 


Specifications of AD8400AR1

Rohs StatusRoHS non-compliantTaps256
Resistance (ohms)1KNumber Of Circuits1
Temperature Coefficient500 ppm/°C TypicalMemory TypeVolatile
InterfaceSPI, 3-Wire SerialVoltage - Supply2.7 V ~ 5.5 V
Operating Temperature-40°C ~ 125°CMounting TypeSurface Mount
Package / Case8-SOIC (3.9mm Width)Resistance In Ohms1.00K
End To End Resistance1kohmTrack TaperLinear
No. Of Steps256Resistance Tolerance± 33%
Supply Voltage Range2.7V To 5.5VControl InterfaceSerial, SPI
No. Of PotsSingle  
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AD8400/AD8402/AD8403
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
B1
A1
1
8
AD8400
GND
W1
2
7
TOP VIEW
CS
3
V
6
DD
(Not to Scale)
SDI
4
CLK
5
Figure 6. AD8400 Pin Configuration
Table 7. AD8400 Pin Function Descriptions
Pin No.
Mnemonic
Description
1
B1
Terminal B RDAC.
2
GND
Ground.
3
CS
Chip Select Input, Active Low. When CS returns high, data in the serial input register is decoded,
based on the address bits, and loaded into the target DAC register.
4
SDI
Serial Data Input.
5
CLK
Serial Clock Input, Positive Edge Triggered.
6
V
Positive Power Supply. Specified for operation at both 3 V and 5 V.
DD
7
W1
Wiper RDAC, Addr = 00
8
A1
Terminal A RDAC.
Table 8. AD8402 Pin Function Descriptions
Pin No.
Mnemonic
Description
1
AGND
Analog Ground.
2
B2
Terminal B RDAC 2.
3
A2
Terminal A RDAC 2.
4
W2
Wiper RDAC 2, Addr = 01
5
DGND
Digital Ground.
6
SHDN
Terminal A Open Circuit. Shutdown controls Variable Resistor 1 and Variable Resistor 2.
7
CS
Chip Select Input, Active Low. When CS returns high, data in the serial input register is decoded,
based on the address bits, and loaded into the target DAC register.
8
SDI
Serial Data Input.
9
CLK
Serial Clock Input, Positive Edge Triggered.
10
RS
Active Low Reset to Midscale. Sets RDAC registers to 80
11
V
Positive Power Supply. Specified for operation at both 3 V and 5 V
DD
12
W1
Wiper RDAC 1, Addr = 00
13
A1
Terminal A RDAC 1.
14
B1
Terminal B RDAC 1.
1
All AGND pins must be connected to DGND.
AGND
1
B1
14
B2
A1
2
13
AD8402
A2
W1
3
12
TOP VIEW
W2
V
4
11
(Not to Scale)
DD
DGND
RS
5
10
SHDN
CLK
6
9
CS
SDI
7
8
Figure 7. AD8402 Pin Configuration
.
2
1
.
2
1
.
2
Rev. E | Page 12 of 32
AGND2
1
B2
2
A2
3
W2
4
AD8403
AGND4
5
TOP VIEW
B4
6
(Not to Scale)
A4
7
W4
8
DGND
9
SHDN
10
CS
11
SDI
12
Figure 8. AD8403 Pin Configuration
.
H
B1
24
A1
23
W1
22
AGND1
21
B3
20
A3
19
W3
18
AGND3
17
V
16
DD
RS
15
CLK
14
SDO
13