AD9740ARURL7 Analog Devices Inc, AD9740ARURL7 Datasheet - Page 19

• Manufacturer Part Number: AD9740ARURL7
• Description: IC DAC 10BIT 210MSPS 28-TSSOP
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9740ARURL7

• Rohs Status: RoHS non-compliant
• Settling Time: 11ns
• Number Of Bits: 10
• Data Interface: Parallel
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 145mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP
• For Use With: AD9740ACP-PCBZ - BOARD EVAL FOR AD9740ACP

POWER AND GROUNDING CONSIDERATIONS,
POWER SUPPLY REJECTION
Many applications seek high speed and high performance
under less than ideal operating conditions. In these application
circuits, the implementation and construction of the printed
circuit board is as important as the circuit design. Proper RF
techniques must be used for device selection, placement, and
routing as well as power supply bypassing and grounding to
ensure optimum performance. Figure 41 to Figure 44 illustrate
the recommended printed circuit board ground, power, and
signal plane layouts implemented on the AD9740 evaluation
board.
One factor that can measurably affect system performance is
the ability of the DAC output to reject dc variations or ac noise
superimposed on the analog or digital dc power distribution.
This is referred to as the power supply rejection ratio (PSRR).
For dc variations of the power supply, the resulting performance
of the DAC directly corresponds to a gain error associated with
the DAC’s full-scale current, I
is common in applications where the power distribution is
generated by a switching power supply. Typically, switching
power supply noise occurs over the spectrum from tens of
kilohertz to several megahertz. The PSRR vs. frequency of the
AD9740 AVDD supply over this frequency range is shown in
Figure 37.
AD9740
85
80
75
70
65
60
55
50
45
40
IOUTA
IOUTB
0
22
21
Figure 37. Power Supply Rejection Ratio (PSRR)
Figure 36. Unipolar Buffered Voltage Output
2
I
OUTFS
= 10mA
4
FREQUENCY (MHz)
200Ω
OUTFS
6
. AC noise on the dc supplies
200Ω
C
R
U1
OPT
FB
8
V
10
OUT
= I
OUTFS
12
× R
Rev. B | Page 19 of 32
FB
Note that the ratio in Figure 37 is calculated as amps out/volts
in. Noise on the analog power supply has the effect of modulating
the internal switches, and therefore the output current. The
voltage noise on AVDD, therefore, is added in a nonlinear
manner to the desired IOUT. Due to the relative different size of
these switches, the PSRR is very code dependent. This can produce
a mixing effect that can modulate low frequency power supply
noise to higher frequencies. Worst-case PSRR for either one of
the differential DAC outputs occur when the full-scale current
is directed toward that output.
As a result, the PSRR measurement in Figure 37 represents a
worst-case condition in which the digital inputs remain static
and the full-scale output current of 20 mA is directed to the
DAC output being measured.
The following illustrates the effect of supply noise on the analog
supply. Suppose a switching regulator with a switching frequency
of 250 kHz produces 10 mV of noise and, for simplicity’s sake
(ignoring harmonics), all of this noise is concentrated at 250 kHz.
To calculate how much of this undesired noise appears as current
noise superimposed on the DAC’s full-scale current, I
must determine the PSRR in dB using Figure 37 at 250 kHz. To
calculate the PSRR for a given R
are converted from A/V to V/V, adjust the curve in Figure 37 by
the scaling factor 20 Ω log (R
then the PSRR is reduced by 34 dB (that is, PSRR of the DAC at
250 kHz, which is 85 dB in Figure 37, becomes 51 dB V
Proper grounding and decoupling should be a primary
objective in any high speed, high resolution system. The
AD9740 features separate analog and digital supplies and
ground pins to optimize the management of analog and digital
ground currents in a system. In general, AVDD, the analog
supply, should be decoupled to ACOM, the analog common, as
close to the chip as physically possible. Similarly, DVDD, the
digital supply, should be decoupled to DCOM as close to the
chip as physically possible.
For those applications that require a single 3.3 V supply for both
the analog and digital supplies, a clean analog supply can be
generated using the circuit shown in Figure 38. The circuit
consists of a differential LC filter with separate power supply
and return lines. Lower noise can be attained by using low ESR
type electrolytic and tantalum capacitors.
TTL/CMOS
CIRCUITS
LOGIC
POWER SUPPLY
Figure 38. Differential LC Filter for Single 3.3 V Applications
3.3V
FERRITE
BEADS
LOAD
LOAD
). For instance, if R
100μF
ELECT.
, such that the units of PSRR
10μF–22μF
TANT.
LOAD
OUTFS
0.1μF
CER.
AD9740
OUT
is 50 Ω,
, users
/V
AVDD
ACOM
IN
).