AD9740ARU Analog Devices Inc, AD9740ARU Datasheet - Page 13

• Manufacturer Part Number: AD9740ARU
• Description: IC DAC 10BIT 210MSPS 28-TSSOP
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9740ARU

• Rohs Status: RoHS non-compliant
• Settling Time: 11ns
• Number Of Bits: 10
• Data Interface: Parallel
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 145mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP
• For Use With: AD9740ACP-PCBZ - BOARD EVAL FOR AD9740ACP

FUNCTIONAL DESCRIPTION
Figure 22 shows a simplified block diagram of the AD9740. The
AD9740 consists of a DAC, digital control logic, and full-scale
output current control. The DAC contains a PMOS current
source array capable of providing up to 20 mA of full-scale
current (I
make up the five most significant bits (MSBs). The next four
bits, or middle bits, consist of 15 equal current sources whose
value is 1/16 of an MSB current source. The remaining LSBs are
binary weighted fractions of the middle bits current sources.
Implementing the middle and lower bits with current sources,
instead of an R-2R ladder, enhances its dynamic performance
for multitone or low amplitude signals and helps maintain the
DAC’s high output impedance (that is, >100 kΩ).
All of these current sources are switched to one or the other of
the two output nodes (that is, IOUTA or IOUTB) via PMOS
differential current switches. The switches are based on the
architecture that was pioneered in the AD9764 family, with
further refinements to reduce distortion contributed by the
switching transient. This switch architecture also reduces
various timing errors and provides matching complementary
drive signals to the inputs of the differential current switches.
The analog and digital sections of the AD9740 have separate
power supply inputs (that is, AVDD and DVDD) that can
operate independently over a 2.7 V to 3.6 V range. The digital
section, which is capable of operating at a clock rate of up to
210 MSPS, consists of edge-triggered latches and segment
decoding logic circuitry. The analog section includes the PMOS
current sources, the associated differential switches, a 1.2 V
band gap voltage reference, and a reference control amplifier.
The DAC full-scale output current is regulated by the reference
control amplifier and can be set from 2 mA to 20 mA via an
external resistor, R
(FS ADJ) pin. The external resistor, in combination with both
the reference control amplifier and voltage reference, V
the reference current, I
current sources with the proper scaling factor. The full-scale
current, I
OUTFS
OUTFS
, is 32 times I
). The array is divided into 31 equal currents that
SET
, connected to the full-scale adjust
REF
, which is replicated to the segmented
REF
.
REFIO
, sets
Rev. B | Page 13 of 32
REFERENCE OPERATION
The AD9740 contains an internal 1.2 V band gap reference. The
internal reference cannot be disabled, but can be easily overridden
by an external reference with no effect on performance. Figure 23
shows an equivalent circuit of the band gap reference. REFIO
serves as either an output or an input depending on whether
the internal or an external reference is used. To use the internal
reference, simply decouple the REFIO pin to ACOM with a
0.1 μF capacitor and connect REFLO to ACOM via a resistance
less than 5 Ω. The internal reference voltage is present at
REFIO. If the voltage at REFIO is to be used anywhere else in
the circuit, then an external buffer amplifier with an input bias
current of less than 100 nA should be used. An example of the
use of the internal reference is shown in Figure 24.
ADDITIONAL
An external reference can be applied to REFIO, as shown in
Figure 25. The external reference can provide either a fixed
reference voltage to enhance accuracy and drift performance
or a varying reference voltage for gain control. Note that the
0.1 μF compensation capacitor is not required because the
internal reference is overridden, and the relatively high input
impedance of REFIO minimizes any loading of the external
reference.
LOAD
REF BUFFER
EXTERNAL
Figure 23. Equivalent Circuit of Internal Reference
OPTIONAL
Figure 24. Internal Reference Configuration
0.1μF
84µA
2kΩ
REFLO
AVDD
REFIO
FS ADJ
7kΩ
AD9740
1.2V REF
REFLO
REFIO
150pF
CURRENT
AD9740
SOURCE
ARRAY
3.3V
AVDD