AD7233BN Analog Devices Inc, AD7233BN Datasheet - Page 2

• Manufacturer Part Number: AD7233BN
• Description: IC DAC 12BIT SRL W/AMP 8-DIP
• Manufacturer: Analog Devices Inc
• Series: DACPORT®r

Specifications of AD7233BN

• Rohs Status: RoHS non-compliant
• Settling Time: 10µs
• Number Of Bits: 12
• Data Interface: Serial
• Number Of Converters: 1
• Voltage Supply Source: Dual ±
• Power Dissipation (max): 168mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 8-DIP (0.300", 7.62mm)

P
STATIC PERFORMANCE
ANALOG OUTPUTS
AC CHARACTERISTICS
POWER REQUIREMENTS
NOTES
1
2
3
4
Specifications subject to change without notice.
TIMING CHARACTERISTICS
Parameter
t
t
t
t
t
t
t
t
NOTES
1
2
3
AD7233–SPECIFICATIONS
DIGITAL INPUTS
Temperature Ranges are as follows: A, B Versions: –40°C to +85°C.
Power Supply Tolerance: A, B Versions: ± 10%.
See Terminology.
Guaranteed by design and characterization, not production tested.
1
2
3
4
5
6
7
8
Sample tested at 25°C to ensure compliance. All input signals are specified with tr and tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.
See Figure 3.
SCLK Mark/Space Ratio range is 40/60 to 60/40.
arameter
3
Resolution
Relative Accuracy
Differential Nonlinearity
Bipolar Zero Error
Full-Scale Error
Full-Scale Temperature Coefficient
Input High Voltage, V
Input Low Voltage, V
Input Current
Input Capacitance
Output Voltage Range
DC Output Impedance
Voltage Output Settling Time
Digital-to-Analog Glitch Impulse
Digital Feedthrough
V
V
I
I
DD
SS
DD
SS
I
Positive Full-Scale Change
Negative Full-Scale Change
IN
Range
Range
3
3
4
3
3
INL
Limit at 25 C, T
(All Versions)
200
15
70
0
40
0
20
0
INH
4
3
4
3
4
A Version
12
± 1
± 0.9
± 6
± 8
± 30
2.4
0.8
± 1
8
± 5
0.5
10
10
30
10
10.8/16.5
–10.8/–16.5
10
2
MIN
1, 2
, T
MAX
(V
Specifications T
DD
= +10.8 V to +16.5 V, V
1
B Version
12
± 1/2
± 0.9
± 6
± 8
± 30
2.4
0.8
± 1
8
± 5
0.5
10
10
30
10
10.8/16.5
–10.8/–16.5
10
2
(V
to GND. All specifications T
DD
Unit
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
= +12 V to +15 V,
MIN
to T
Unit
Bits
LSB max
LSB max
LSB max
LSB max
ppm of FSR/°C typ
V min
V max
µA max
pF max
V
Ω typ
µs max
µs max
nV secs typ
nV secs typ
V min/V max
V min/V max
mA max
mA max
MAX
unless otherwise noted.)
SS
= –10.8 V to –16.5 V, GND = O V, R
Conditions/Comments
SCLK Cycle Time
SYNC to SCLK Falling Edge Setup Time
SYNC to SCLK Hold Time
Data Setup Time
Data Hold Time
SYNC High to LDAC Low
LDAC Pulsewidth
LDAC High to SYNC Low
2
V
SS
MIN
= –12 V to –15 V,
to T
MAX
Test Conditions/Comments
Guaranteed Monotonic
DAC Latch Contents 0000 0000 0000
Guaranteed By Process
V
Settling Time to Within ± 1/2 LSB of Final Value
Typically 4 µs; DAC Latch 100. . .000 to 011. . .111
Typically 5 µs; DAC Latch 011. . .111 to 100. . .000
DAC Latch Contents Toggled Between All 0s and all 1s
LDAC = High
For Specified Performance Unless Otherwise Stated
For Specified Performance Unless Otherwise Stated
Output Unloaded; Typically 7 mA at Thresholds
Output Unloaded; Typically 1 mA at Th
IN
unless otherwise noted.)
= 0 V to V
2
GND = 0 V, R
DD
L
= 2 k , C
L
= 2 k , C
L
= 100 pF. All
L
resholds
= 100 pF