XC2C512-7FGG324C Xilinx Inc, XC2C512-7FGG324C Datasheet - Page 18

• Manufacturer Part Number: XC2C512-7FGG324C
• Description: IC CR-II CPLD 512MCELL 324-FBGA
• Manufacturer: Xilinx Inc
• Series: CoolRunner IIr

Specifications of XC2C512-7FGG324C

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 7.1ns
• Voltage Supply - Internal: 1.7 V ~ 1.9 V
• Number Of Logic Elements/blocks: 32
• Number Of Macrocells: 512
• Number Of Gates: 12000
• Number Of I /o: 270
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 324-FBGA
• Features: Programmable
• Voltage: 1.8V
• Memory Type: CMOS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Logic Elements/cells: -

XC2C512 CoolRunner-II CPLD
Pin Descriptions (Continued)
18
Function
Block
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
Macro-
cell
10
12
13
14
15
16
10
12
13
14
15
16
11
11
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
PQ208
122
123
125
91
90
89
88
87
86
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
FT256
M10
K15
T12
P10
R10
T10
L16
L12
T11
M9
R9
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
FG324
AB17
AA16
AB16
AA15
AB15
M22
W16
W15
N19
N21
N22
P19
P20
P21
P22
Y16
Y15
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Bank
I/O
www.xilinx.com
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Pin Descriptions (Continued)
Notes:
1.
2.
Function
Block
GTS = global output enable, GSR = global reset/set, GCK =
global clock, CDRST = clock divide reset, DGE = DataGATE
enable.
GCK, GSR, and GTS pins can also be used for general
purpose I/O.
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
Macro-
cell
10
12
13
14
15
16
10
12
13
14
15
16
11
11
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
PQ208
126
127
128
131
85
84
83
82
80
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
FT256
DS096 (v3.2) March 8, 2007
K16
J14
J15
J13
M8
P9
N9
P8
R8
N8
T9
T8
T7
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Product Specification
FG324
AA14
AB14
AA13
AB13
W14
W13
W12
M19
M20
M21
K22
Y14
Y13
L22
L21
L20
L19
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Bank
I/O
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
R