XE8807AMI026TLF Semtech, XE8807AMI026TLF Datasheet - Page 67

IC MCU LOW PWR MTP FLASH 32-TQFP

XE8807AMI026TLF

Manufacturer Part Number
XE8807AMI026TLF
Description
IC MCU LOW PWR MTP FLASH 32-TQFP
Manufacturer
Semtech
Datasheet

Specifications of XE8807AMI026TLF

Applications
Sensing Machine
Core Processor
RISC
Program Memory Type
FLASH (11 kB)
Controller Series
XE8000
Ram Size
512 x 8
Interface
UART, USRT
Number Of I /o
24
Voltage - Supply
2.4 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-TQFP, 32-VQFP
For Use With
XE8000MP - PROG BOARD AND PROSTART2 CARD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
XE8807AMI026TR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XE8807AMI026TLF
Manufacturer:
IDT
Quantity:
62
Part Number:
XE8807AMI026TLF
Manufacturer:
Semtech
Quantity:
10 000
Note: Depending on the status of the EnResetPConf bit in RegSysCtrl, RegPAEdge, RegPADebounce and
RegPACtrl can be reset by any of the possible system resets or only with power-on reset and NRESET pad.
11.4 Interrupts and events map
11.5 Port A (PA) Operation
The Port A input status (debounced or not) can be read from RegPAin.
Debounce mode:
Each bit in Port A can be individually debounced by setting the corresponding bit in RegPADebounce. After reset,
the debounce function is disabled. After enabling the debouncer, the change of the input value is accepted only if
height consecutive samples are identical. Selection of the clock is done by bit DebFast in Register RegPACtrl.
Note: The tolerance on the debounce frequency depends on the selected clock source. When the external clock is
used, the pulse width will be correct if the input of the low prescaler is set to a frequency close to 32kHz (see clock
block documentation).
Pullups/Snap-to-rail:
Different functions are possible depending on the value of the registers RegPAPullup and RegPASnaptorail.
When the corresponding bit in RegPAPullup is set to 0, the inputs are floating (pullup and pulldown resistors are
disconnected). When the corresponding bit in RegPAPullup is 1 and in RegPASnaptorail is 0, a pullup resistor is
connected to the input pin. Finally, when the corresponding bit in RegPAPullup is 1 and in RegPASnaptorail is 1,
the snap-to-rail function is active.
© Semtech 2006
pos.
pos.
7:1
7:0
0
Interrupt source
pa_irqbus[5]
pa_irqbus[4]
pa_irqbus[1]
pa_irqbus[0]
pa_irqbus[7]
pa_irqbus[6]
pa_irqbus[3]
pa_irqbus[2]
RegPACtrl
RegPASnaptorail
PASnaptorail[7:0]
DebFast
[7:1]
RegIrqMid[5]
RegIrqMid[4]
RegIrqMid[1]
RegIrqMid[0]
RegIrqLow[7]
RegIrqLow[6]
RegIrqLow[3]
RegIrqLow[2]
the interrupt manager
Default mapping in
DebFast
rw
r
r w
rw
rw
Table 11-10: debounce frequency selection
0
1
reset
0000000
0 nresetpconf
reset
0 nresetpconf
Table 11-9: RegPASnaptorail
Table 11-8: RegPACtrl
11-4
Clock filter
RegEvn[4]
RegEvn[0]
Default mapping in the
32kHz
1kHz
description
description
event manager
0 = slow debounce, 1 = fastdebounce
set snap-to-rail input on
Unused
XE8806A/XE8807A
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