CY7C64713-100AXC Cypress Semiconductor Corp, CY7C64713-100AXC Datasheet - Page 39

IC MCU USB EZ FX1 16KB 100LQFP

CY7C64713-100AXC

Manufacturer Part Number
CY7C64713-100AXC
Description
IC MCU USB EZ FX1 16KB 100LQFP
Manufacturer
Cypress Semiconductor Corp
Series
EZ-USB FX1™r
Datasheet

Specifications of CY7C64713-100AXC

Program Memory Type
ROMless
Package / Case
100-LQFP
Applications
USB Microcontroller
Core Processor
8051
Controller Series
CY7C647xx
Ram Size
16K x 8
Interface
I²C, USB, USART
Number Of I /o
40
Voltage - Supply
3.15 V ~ 3.45 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Processor Series
CY7C64xx
Core
M8C
Data Bus Width
8 bit
Data Ram Size
16 KB
Interface Type
I2C/USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
40
Number Of Timers
3
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
CY3674
Minimum Operating Temperature
0 C
Controller Family/series
(8051) USB
Core Size
8 Bit
No. Of I/o's
40
Ram Memory Size
256Byte
Cpu Speed
48MHz
No. Of Timers
3
Embedded Interface Type
I2C, USART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
428-1681 - KIT USB FX1 DEVELOPMENT BOARD428-1677 - KIT DEVELOPMENT EZ-USB FX2LP428-1339 - KIT LOW SPEED PERSONALITY BOARD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
428-1679
CY7C64713-100AXC

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Slave FIFO Synchronous Write
In the following figure, dashed lines indicate signals with programmable polarity.
The following table provides the Slave FIFO Synchronous Write Parameters with Internally Sourced IFCLK.
Table 19. Slave FIFO Synchronous Write Parameters with Internally Sourced IFCLK
The following table provides the Slave FIFO Synchronous Write Parameters with Externally Sourced IFCLK.
Table 20. Slave FIFO Synchronous Write Parameters with Externally Sourced IFCLK
Document #: 38-08039 Rev. *F
t
t
t
t
t
t
t
t
t
t
t
t
IFCLK
SWR
WRH
SFD
FDH
XFLG
IFCLK
SWR
WRH
SFD
FDH
XFLG
Parameter
Parameter
IFCLK Period
SLWR to Clock Setup Time
Clock to SLWR Hold Time
FIFO Data to Clock Setup Time
Clock to FIFO Data Hold Time
Clock to FLAGS Output Propagation Time
IFCLK Period
SLWR to Clock Setup Time
Clock to SLWR Hold Time
FIFO Data to Clock Setup Time
Clock to FIFO Data Hold Time
Clock to FLAGS Output Propagation Time
FLAGS
IFCLK
SLWR
DATA
Figure 21. Slave FIFO Synchronous Write Timing Diagram
Z
Description
Description
t
SWR
t
SFD
t
IFCLK
t
WRH
t
N
t
XFLG
FDH
20.83
20.83
18.1
12.1
Min
Min
9.2
3.6
3.2
4.5
0
0
Z
[16]
Max
Max
13.5
200
9.5
[16]
[16]
CY7C64713
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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