AN2135SC Cypress Semiconductor Corp, AN2135SC Datasheet - Page 183

• Manufacturer Part Number: AN2135SC
• Description: IC MCU 8051 8K RAM 24MHZ 44QFP
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB®r

Specifications of AN2135SC

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: AN213x
• Ram Size: 8K x 8
• Interface: I²C, USB
• Number Of I /o: 8
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1308

10.3.1 RAM Download
Once enumerated, the host can download code into the EZ-USB RAM using the “Firm-
ware Load” vendor request (Chapter 7, "EZ-USB Endpoint Zero"). The last packet loaded
writes 0 to the CPUCS register, which clears the 8051 RESET bit.
10.3.2 EEPROM Load
Chapter 5 describes the EEPROM boot loads in detail. Briefly, at power-on, the EZ-USB
core checks for the presence of an EEPROM on its I
EEPROM byte. If it reads 0xB2 as the first byte, the EZ-USB core downloads 8051 code
from the EEPROM into internal RAM. The last byte of a “B2” load writes 0x00 to the
CPUCS register (at 0x7F92), which releases the 8051 from reset.
10.3.3 External ROM
EZ-USB systems can use external program memory containing 8051 code and USB
device descriptors, which include the VID/DID/PID bytes. Because these systems do no
require and I
releases 8051 reset when:
The EZ-USB core also sets the ReNum bit to “1,” giving USB control to the 8051.
Once the 8051 is running, the USB host may reset the 8051 by downloading the value
0x01 to the CPUCS register. The host might do this in preparation for loading code over-
lays, effectively magnifying the size of the internal EZ-USB RAM. For such applications
it is important to know the state of the EZ-USB chip during and after an 8051 reset. In this
Page 10-4
Note
The other bit in the CPUCS register, CLK24OE, is writable only by the 8051, so the host
writing a zero byte to this register does not turn off the CLK24 signal.
10.4
1. EA=1 (External code memory), and
2. No “B0/B2” EEPROM is detected on the I
8051 Reset Effects
2
C EEPROM to supply the VID/DID/PID, the EZ-USB core automatically
Chapter 10. EZ-USB Resets
2
C bus.
2
C bus. If found, it reads the first
EZ-USB TRM v1.9