AN2135SC Cypress Semiconductor Corp, AN2135SC Datasheet - Page 292

• Manufacturer Part Number: AN2135SC
• Description: IC MCU 8051 8K RAM 24MHZ 44QFP
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB®r

Specifications of AN2135SC

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: AN213x
• Ram Size: 8K x 8
• Interface: I²C, USB
• Number Of I /o: 8
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1308

All DPTR-related instructions use the currently selected data pointer. To switch the active
pointer, toggle the SEL bit. The fastest way to do so is to use the increment instruction (INC
DPS). This requires only one instruction to switch from a source address to a destination
address, saving application code from having to save source and destination addresses when
doing a block move.
Using dual data pointers provides significantly increased efficiency when moving large blocks
of data.
The SFR locations related to the dual data pointers are:
B.1.7 Special Function Registers
The Special Function Registers (SFRs) control several of the features of the 8051. Most of the
8051 core SFRs are identical to the standard 8051 SFRs. However, there are additional SFRs
that control features that are not available in the standard 8051.
Table B-4. lists the 8051 core SFRs and indicates which SFRs are not included in the standard
8051 SFR space.
In Table B-5., SFR bit positions that contain a 0 or a 1 cannot be written to and, when read,
always return the value shown (0 or 1). SFR bit positions that contain “-” are available but not
used. Table B-5. lists the reset values for the SFRs.
The following SFRs are related to CPU operation and program execution:
Table B-6. lists the functions of the bits in the PSW SFR. Detailed descriptions of the
remaining SFRs appear with the associated hardware descriptions in Appendix C of this
databook.
B - 12
82h
83h
84h
85h
86h
81h
D0h
E0h
F0h
DPL0
DPH0
DPL1
DPH1
DPS
SP
PSW
ACC
B
DPTR0 low byte
DPTR0 high byte
DPTR1 low byte
DPTR1 high byte
DPTR Select (Bit 0)
Stack Pointer
Program Status Word ()
Accumulator Register
B Register
Appendix B: 8051 Architectural Overview
EZ-USB TRM v1.9