CY7C66113C-LFXCT Cypress Semiconductor Corp, CY7C66113C-LFXCT Datasheet - Page 15

• Manufacturer Part Number: CY7C66113C-LFXCT
• Description: IC MCU 8K USB HUB 4 PORT 56VQFN
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C66113C-LFXCT

• Applications: USB Hub/Microcontroller
• Core Processor: M8
• Program Memory Type: OTP (8 kB)
• Controller Series: USB Hub
• Ram Size: 256 x 8
• Interface: I²C, USB, HAPI
• Number Of I /o: 31
• Voltage - Supply: 4 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY3649 - PROGRAMMER HI-LO USB M8428-1339 - KIT LOW SPEED PERSONALITY BOARD
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

Suspend Mode
The CY7C66x13C is placed into a low power state by setting the
Suspend bit of the Processor Status and Control register. All logic
blocks in the device are turned off except the GPIO interrupt logic
and the USB receiver. The clock oscillator, PLL, and the
free-running and WDTs are shut down. Only the occurrence of
an enabled GPIO interrupt or non idle bus activity at a USB
upstream or downstream port wakes the part from suspend. The
Run bit in the Processor Status and Control Register must be set
to resume a part out of suspend.
The clock oscillator restarts immediately after exiting suspend
mode. The microcontroller returns to a fully functional state 1 ms
after the oscillator is stable. The microcontroller executes the
instruction following the I/O write that placed the device into
suspend mode before servicing any interrupt requests.
General Purpose I/O (GPIO) Ports
There are up to 31 GPIO pins (P0[7:0], P1[7:0], P2[7:0], and P3[6:0]) for the hardware interface. The number of GPIO pins changes
based on the package type of the chip. Each port is configured as inputs with internal pull ups, open drain outputs, or traditional CMOS
outputs. Port 3 offers a higher current drive, with typical current sink capability of 12 mA. The data for each GPIO port is accessible
through the data registers. Port data registers are shown in
Document Number: 38-08024 Rev. *D
(Latch is Transparent
except in HAPI mode)
Interrupt
Enable
Interrupt
Controller
OE
Port Write
Reg_Bit
Port Read
Internal
Data Bus
STRB
GPIO
CFG
Data
Interrupt
Latch
Data
In
Latch
Data
Out
Latch
Figure 7. Block Diagram of a GPIO Pin
mode
2-bits
Figure 8
The GPIO interrupt allows the controller to wake up periodically
and poll system components while maintaining a very low
average power consumption. To achieve the lowest possible
current during suspend mode, all I/O should be held at V
Gnd. This also applies to internal port pins that may not be
bonded in a particular package.
Typical code for entering suspend is given here:
floating pins)
for wakeup
Register – Enter suspend, wait for USB activity
(or GPIO Interrupt)
through
Q3*
Q1
14 kΩ
V
...
...
mov a, 09h; Set suspend and run bits
iowr FFh; Write to Status and Control
nop
CC
Figure
Q2
; All GPIO set to low power state (no
; Enable GPIO interrupts if desired
; This executes before any ISR
11, and are set to 1 on reset.
CY7C66013C, CY7C66113C
GPIO
PIN
*Port 0,1,2: Low I
Port 3: High I
sink
sink
Page 15 of 59
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