Z84C9008VEG Zilog, Z84C9008VEG Datasheet - Page 20

• Manufacturer Part Number: Z84C9008VEG
• Description: IC 8MHZ Z80 KIO XTEMP 84-PLCC
• Manufacturer: Zilog

Specifications of Z84C9008VEG

• Processor Type: Z80
• Features: Serial/Parallel Input/Output, Counter/Timer Circuit
• Speed: 8MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 84-LCC (J-Lead)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AC Characteristics
Table 5. AC Characteristics of the Z84C90
PS011802-0902
No. Symbol
Bus Interface Timing
1
2
3
4
5
6
7
8
9
10 TdRlr(DOz)
11
12 TsD(Cr)
13 TdIOI(DO)
14 ThIOr(D)
15 THIOr(A)
16 TsM1f(Cr)
17 TsM1r(Cf)
18 TdM1f(IEOf)
19 TsIEI(IOf)
20 TdIEIf(IEOf)
21 TdIEIf(IEOr)
TcC
TwCh
TwCl
TfC
TrC
TsA(Rlf)
TsRl(Cr)
Th
TdCr(DO)
ThRDr(D)
Parameter
Clock Cycle Time
Clock Pulse Width (High)
Clock Pulse Width (Low)
Clock Fall Time
Clock Rise Time
Address, CS Setup to RD, IORQ
Fall
RD, IORQ to Clock Rise Setup
Hold Time for Specified Setup
CLOCK Rise to Data Out Delay
RD, IORQ Rise to Data Out Float
Delay
M1,RD,IORQ Rise to Data Float
Data in to Clock Rise Setup
IORQ Fall to Data Out Delay
(INTACK Cycle)
IORQ Rise to Data Float (INTACK)
IORQ Rise to Address Hold
M1 Fall to Clock Rise Setup
M1 Rise to Clock Fall Setup
(M1 Cycle)
M1 Fall to IEO Fall Delay (Interrupt
Immediately preceding M1 Fall)
IEI to IORQ Fall Setup
IEI Fall to IEO Fall Delay
IEI Rise to IEO Rise Delay
(after ED Decode)
2
3
3
3
3
Min
125
-15
55
55
50
50
15
15
30
15
15
40
8MHz
KIO Serial/Parallel Counter Timer
Max
100
160
160
DC
DC
DC
10
10
75
95
•
•
Min
100
-15
42
42
40
50
15
15
25
15
15
40
10MHz
Max
150
150
DC
DC
DC
10
10
80
60
95
1
•
•
Min Max U/M
32
22
80
32
30
40
15
15
15
15
40
15
12MHz
125 ns
125 ns
DC ns
DC ns
DC ns
10 ns
10 ns
65 ns
55 ns
95 ns
•
•
Z84C90
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
15