IDT79RC32V364-133DA IDT, Integrated Device Technology Inc, IDT79RC32V364-133DA Datasheet - Page 9

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IDT79RC32V364-133DA

Manufacturer Part Number
IDT79RC32V364-133DA
Description
IC MPU 32BIT EMB 133MHZ 144-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT79RC32V364-133DA

Processor Type
RISC 32-Bit
Speed
133MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Other names
79RC32V364-133DA

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Quantity
Price
Part Number:
IDT79RC32V364-133DA
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT79RC32V364-133DAG
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
79RC32364™
PCST(2:0)
PCST(4:3)
DebugBoot
Clock/Control Interface
MasterClk
VccP
VssP
Vcc I/O
Vcc Core
Vss
Pin
I
I
I
I/O
I/O
I
I
I
I
Type
PCST(2:0)/ModeBit(2:0)
PC Trace Status Information
111 (STL) Pipe line Stall
110 (JMP) Branch/Jump forms with PC output
101 (BRT) Branch/Jump forms with no PC output
100 (EXP) Exception generated with an exception vector code output
011 (SEQ) Sequential performance
010 (TST) Trace is outputted at pipeline stall time
001 (TSQ) Trace trigger output at performance time
000 (DBM) Run Debug Mode
During power-on reset (cold reset), PCST(2:0) serves as ModeBit(2:0).
PCST(4:3)/ModeBit(4:3)
PC Trace Status Information. Reserved Pins for future expansion. During power-on reset, PCST(4:3) serves as ModeBit(4:3).
DebugBoot
The Debug Boot input is used during reset and forces the CPU core to take a debug exception at the end of the reset sequence
instead of a reset exception. This enables the CPU to boot from the ICE probe without having the external memory working. This
input signal is level sensitive and is not latched internally. This signal will also set the JtagBrk bit in the JTAG_Control_Register[12].
MasterClock
This input clock is the bus clock. The core frequency is derived by multiplying this clock up.
VccP
Quiet Vcc for PLL.
VssP
Quiet Vss for PLL.
Supply voltage for output buffers.
Supply voltage for internal logic.
Ground.
*Notice: The information in this document is subject to change without notice
Table 3 System Interface Pin Descriptions (Page 4 of 4)
9 of 21
Description
June 20, 2000

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