IDT79RC32V334-150BB IDT, Integrated Device Technology Inc, IDT79RC32V334-150BB Datasheet - Page 17

• Manufacturer Part Number: IDT79RC32V334-150BB
• Description: IC PROC 32BIT CORE 150MHZ 256BGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: Interprise™r

Specifications of IDT79RC32V334-150BB

• Processor Type: RISC 32-Bit
• Speed: 150MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 256-BGA
• Family Name: RC32300
• Device Core: MIPS-II
• Device Core Size: 32b
• Frequency (max): 150MHz
• Instruction Set Architecture: MIPS-II
• Supply Voltage 1 (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Operating Supply Voltage (min): 3.135V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 79RC32V334-150BB

uart_rx[1:0], uart_tx[1:0], uart_cts_n[0],
uart_dsr_n[0], uart_dtr_n[0], uart_rts_n[0]
uart_rx[1:0], uart_tx[1:0], uart_cts_n[0],
uart_dsr_n[0], uart_dtr_n[0], uart_rts_n[0]
uart_rx[1:0], uart_tx[1:0], uart_cts_n[0],
uart_dsr_n[0], uart_dtr_n[0], uart_rts_n[0]
uart_rx[1:0], uart_tx[1:0], uart_cts_n[0],
uart_dsr_n[0], uart_dtr_n[0], uart_rts_n[0]
SPI Interface
spi_clk, spi_mosi, spi_miso
spi_clk, spi_mosi, spi_miso
spi_clk, spi_mosi, spi_miso
spi_clk, spi_mosi, spi_miso
Reset
mem_addr[19:17]
mem_addr[19:17]
mem_addr[22:20],
mem_addr[22:20]
Debug Interface
debug_cpu_dma_n, debug_cpu_ack_n,
debug_cpu_ads_n, debug_cpu_i_d_n,
ejtag_pcst[2:0]
debug_cpu_dma_n, debug_cpu_ack_n,
debug_cpu_ads_n, debug_cpu_i_d_n,
ejtag_pcst[2:0]
debug_cpu_dma_n, debug_cpu_ack_n,
debug_cpu_ads_n, debug_cpu_i_d_n
debug_cpu_dma_n, debug_cpu_ack_n,
debug_cpu_ads_n, debug_cpu_i_d_n
JTAG Interface
jtag_tms, jtag_tdi, jtag_trst_n
jtag_tms, jtag_tdi, jtag_trst_n
jtag_tdo
UARTs
IDT 79RC32334—Rev. Y
Signal
Table 6 AC Timing Characteristics - RC32334 (Part 3 of 4)
Tsu7
Thld9
Tdo16
Tdoh8
Tsu7
Thld9
Tdo16
Tdoh8
Tsu10
Thld10
Tsu22
Thld22
Tsu20
Thld20
Tdo20
Tdoh20
t
t
t
Symbol
5
6
4
cpu_masterclk rising
cpu_masterclk rising
cpu_masterclk rising
cpu_masterclk rising
cpu_masterclk rising
cpu_masterclk rising
cpu_masterclk rising
cpu_masterclk rising
cpu_coldreset_n rising
cpu_coldreset_n rising
cpu_masterclk rising
cpu_masterclk rising
cpu_coldreset_n rising
cpu_coldreset_n rising
cpu_masterclk rising
cpu_masterclk rising
jtag_tck rising
jtag_tck rising
jtag_tck falling
Reference
Edge
17 of 30
RC32334
100MHz
Min
15
15
15
10
10
10
10
15
—
—
—
—
1
1
1
9
1
1
1
Max
—
—
15
—
—
—
15
—
—
—
—
—
—
—
15
—
—
—
10
1
RC32334
Min
133MHz
12
12
12
12
—
10
10
10
10
—
—
—
1
1
1
7
1
1
1
Max
12
12
12
10
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1
RC32334
Min
150MHz
10
10
10
10
10
10
10
10
—
—
—
—
1
1
1
6
1
1
1
Max
10
10
10
10
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1
Unit
August 31, 2004
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Chapter 17,
Figure 17.16
Chapter 18,
Figures 18.8
and 18.9
Chapter 19
Figures 19.8
and 19.9
Chapter 19,
Figure 19.9 and
Chapter 9,
Figure 9.2
See Figure 4
below.
Reference
Diagram
Manual
Timing
User