IDT79RC32V332-150DHG IDT, Integrated Device Technology Inc, IDT79RC32V332-150DHG Datasheet - Page 4

• Manufacturer Part Number: IDT79RC32V332-150DHG
• Description: IC PROC 32BIT CPU 150MHZ 208-QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: Interprise™r

Specifications of IDT79RC32V332-150DHG

• Processor Type: RISC 32-Bit
• Speed: 150MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Other names: 79RC32V332-150DHG

intended to simplify the task of system debugging when using a logic
analyzer. This product allows the logic analyzer to differentiate transac-
tions initiated by DMA from those initiated by the CPU and further allows
CPU transactions to be sorted into instruction fetches vs. data fetches.
allowing board manufacturing diagnostics and debug.
Packaging
package.
Thermal Considerations
guaranteed in an ambient temperature range of 0° to +70° C for
commercial temperature devices; -40° to +85° C for industrial tempera-
ture devices.
Revision History
period in Table 5 and added footnote. In Table 1, added 2nd alternate
function for spi_mosi, spi_miso, spi_sck. In Table 11, added “2” in Alt
column for pins 186, 187, 188. In RC32332 Alternate Signal Functions
table, added pin names in Alt #2 column for pins 186, 187, 188.
Tdoh9 to Thld13 and moved the values for Tsu9 from the Max to the Min
column.
uart_tx[0] from PIO[3] to PIO[1]. In Table 11, changed the number of
alternate pins for Pin 156 from 1 to 2. In Table 12, added PIO[7] to Alt #2
column for Pin 156 and changed PIO[3] to PIO[1] for Pin 207.
and commercial uses from +70° C to +85° C.
output_clk category and added NA to Min and Max columns. In Figure 3
(Reset Specification), enhanced signal line for cpu_masterclk. In Local
System Interface section of AC Timing Characteristics table, changed
values in Min column for last category of signals (Tdoh3) from 1.5 to 2.5
for both speeds. In SDRAM Controller section of same table, changed
values in Min column for last category of signals (9 signals) from 1 to 2.5
for both speeds.
mem_addr[19:17] from Tsu22 and Thld22 to Tsu10 and Thld10;
switched mem_addr[22:20] from Tsu10 and Thld10 to Tsu22 and
Thld22; moved ejtag_pcst[2:0] from Reset to Debug Interface category
under Tsu20 and Thld20.
IDT 79RC32332
Secondly, the RC32332 implements additional reporting signals
Finally, the RC32332 implements a full boundary scan capability,
The RC32332 is packaged using a 208 Quad Flat Pack (QFP)
The RC32332 consumes less than 2.0 W peak power. The device is
November 15, 2000: Initial publication.
December 12, 2000: Changed Max values for cpu_masterclock
January 4, 2001: In Table 6 under Interrupt Handling, changed
February 23, 2001: In Table 1, changed alternate function for
March 13, 2001: Changed upper ambient temperature for industrial
June 7, 2001: In the Clock Parameters table, added footnote 3 to
September 14, 2001: In the Reset category of Table 6: switched
4 of 30
2 footnotes to Table 10. Changed to DH package.
SDRAM support. Changed upper ambient temperature for commercial
uses back from +85° C to +70° C (changed erroneously from 70 to 85
on March 13, 2001). Added Reset State Status column to Table 1.
Revised description of jtag_trst_n in Table 1 and changed this pin to a
pull-down instead of a pull-up.
no longer applicable to revision Z.
section, changed Thld9 Min values from 2 to 1; in PIO section, changed
Thld9 Min values from 2 to 1. Changed revision Y data sheet from
Preliminary to Final.
Clock Parameters. Added mem_addr[16] and sdram_addr[16] to Tables
1 and 12. Changed Logic Diagram to include sdram_addr[16].
Characteristics, setup and hold time categories for cpu_coldreset_n
have been deleted.
to include 2.5V values where appropriate. Added a Power Consumption
table, Temperature and Voltage table, and Power Curves for the 2.5V
device. In the PCI category of Table 6, created separate sections for
3.3V and 2.5V devices and in 2.5V section changed time to 4 ns for
pci_cbe_n[3:0], pci_frame_n, pci_trdy_n, and pci_irdy_n. In Table 8,
added 3 new categories (Input Pads, PCI Input Pads, and All Pads) and
added footnotes 2 and 3. In Table 13, pins 181 and 184 were changed
from Vcc Core to Vcc I/O.
for pci_rst_n. Specified “cold” reset on pages 12 and 13. Changed
several values in Table 12, Absolute Maximum Ratings, and changed
footnote 1 to that table.
November 1, 2001: Added Input Voltage Undershoot parameter and
May 2, 2002: Changed from PCI 2.1 to 2.2 compliant. Added 512 MB
July 3, 2002: This data sheet now describes revision Y silicon and is
July 12, 2002: Added 150MHz speed grade. In Table 6: DMA
September 18, 2002: Added cpu_coldreset_n rise time to Table 5,
December 18, 2002: In the Reset section of Table 6, AC Timing
September 2, 2003: Added 2.5V version of device. Changed tables
May 4, 2004: Revised values in Table 9, Power Consumption.
March 24, 2004: In Table 1, changed description in Satellite Mode
May 4, 2004