IDTSTAC9228D3TAEA2XR IDT, Integrated Device Technology Inc, IDTSTAC9228D3TAEA2XR Datasheet - Page 50

• Manufacturer Part Number: IDTSTAC9228D3TAEA2XR
• Description: IC AUDIO CODEC 8CH HD 3.3V 48QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Audio Codec, HDr

Specifications of IDTSTAC9228D3TAEA2XR

• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 3 / 4
• Sigma Delta: Yes
• S/n Ratio, Adcs / Dacs (db) Typ: 90 / 105
• Dynamic Range, Adcs / Dacs (db) Typ: 90 / 95
• Voltage - Supply, Analog: 3.14 V ~ 3.47 V; 3.8 V ~ 4.2 V; 4.28 V ~ 4.73 V; 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.14 V ~ 3.47 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFP
• Single Supply Voltage (typ): 3.3V
• Single Supply Voltage (min): 3.135V
• Single Supply Voltage (max): 3.465V
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: STAC9228D3TAEA2XR

IDT™
STAC9227/9228/9228D
8-CHANNEL HIGH DEFINITION AUDIO CODEC
8-CHANNEL HIGH DEFINITION AUDIO CODEC
6.2.14. AFG GPIOEn
[31:5]
Bit
Bit
[1]
[0]
[4]
[3]
[2]
Set1
Get
Bitfield Name
Bitfield Name
Mask4
Mask3
Mask2
Data1
Data0
Rsvd
Table 40. AFG GPIOEn
Table 38. AFG GPIO
Table 39. AFG GPIOEn
IDT CONFIDENTIAL
Verb ID
F16
716
RW
RW
RW
RW
RW
RW
RW
50
R
Command Response Format
See bits [7:0] of bitfield table.
Command Response Format
Reset
Reset
0x0
0x0
0x0
0x0
0x0
0x0
Command Verb Format
Payload
Data for GPIO1. If this GPIO bit is
configured as Sticky (edge-sensitive) input,
it can be cleared by writing zero (one) here
when the corresponding Polarity Control bit
is zero (one).
Data for GPIO0. If this GPIO bit is
configured as Sticky (edge-sensitive) input,
it can be cleared by writing zero (one) here
when the corresponding Polarity Control bit
is zero (one).
Reserved
Enable for GPIO4:
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO3:
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO2:
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
00
STAC9227/9228/9228D
Description
Description
See bitfield table.
0000_0000h
Response
PC AUDIO
V 1.1 01/08