EMC6D103S-CZC-TR SMSC, EMC6D103S-CZC-TR Datasheet - Page 84

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EMC6D103S-CZC-TR

Manufacturer Part Number
EMC6D103S-CZC-TR
Description
Industrial Temperature Sensors Auto Fan Contrllr Up to 4 Fans
Manufacturer
SMSC
Datasheet

Specifications of EMC6D103S-CZC-TR

Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Revision 0.3 (03-01-07)
8.2.42
8.2.43
Register
Address
Register
Address
98h
97h
/Write
Read
R/W
/Write
Read
R/W
01=twice a second
1x=every 300msec
Bit[2] Snap to Zero (SZEN)
This bit determines if the PWM output ramps down to OFF or if it is immediately set to zero.
0=Step Down the PWMx output to Off at the programmed Ramp Rate
1=Transition PWMx to Off immediately when the calculated duty cycle is 00h (default)
Bit[4:3] Guard time (Mode 2 only)
00=63 clocks (90kHz clocks ~ 700usec)
01=32 clocks (90kHz clocks ~ 356usec) (default)
10=16 clocks (90kHz clocks ~ 178usec)
11=8 clocks (90kHz clocks ~ 89usec)
Bit[5] Opportunistic Mode Enable
0= Opportunistic Mode Disabled. Update Tach Reading once per PWMx Update Period (see Bits[1:0]
in this register)
1=Opportunistic Mode is Enabled. The tachometer reading register is updated any time a valid
tachometer reading can be made without stretching the PWM output signal. If a valid reading is
detected prior to the Update cycle, then the Update counter is reset.
Bit[7:6] Reserved
Register 97h: SMSC Test Register
These registers become read only when the Lock bit is set. Any further attempts to write to these
registers shall have no effect.
This is an SMSC Test Register. Writing to this register may cause unwanted results.
Register 98h:SMSC Test Register
These registers become read only when the Lock bit is set. Any further attempts to write to these
registers shall have no effect.
This is an SMSC Test Register. Writing to this register may cause unwanted results.
SMSC Test Register
Register Name
SMSC Test Register
Register Name
Table 8.63 Register 97h: SMSC Test Register
Table 8.64 Register 98h:SMSC Test Register
Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features
(MSb)
TST7
Bit 7
(MSb)
TST7
Bit 7
DATASHEET
TST6
Bit 6
TST6
Bit 6
84
TST5
Bit 5
TST5
Bit 5
TST4
Bit 4
TST4
Bit 4
TST3
TST3
Bit 3
Bit 3
TST2
Bit 2
TST2
Bit 2
TST1
Bit 1
TST1
Bit 1
SMSC EMC6D103
(LSb)
TST0
Bit 0
(LSb)
TST0
Bit 0
Datasheet
Default
Default
Value
Value
5Ah
F1h

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