AD1837AAS-REEL Analog Devices Inc, AD1837AAS-REEL Datasheet - Page 17

• Manufacturer Part Number: AD1837AAS-REEL
• Description: IC CODEC 2ADC/8DAC 24 BIT 52MQFP
• Manufacturer: Analog Devices Inc
• Type: General Purposer

Specifications of AD1837AAS-REEL

• Rohs Status: RoHS non-compliant
• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 8
• Sigma Delta: Yes
• S/n Ratio, Adcs / Dacs (db) Typ: 105 / 108
• Dynamic Range, Adcs / Dacs (db) Typ: 105 / 108
• Voltage - Supply, Analog: 4.5 V ~ 5.5 V
• Voltage - Supply, Digital: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 52-BQFP
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 3/4.5V
• Single Supply Voltage (max): 5.5V
• Package Type: MQFP
• For Use With: EVAL-AD1837AEB - BOARD EVALUATION FOR AD1837A
• Lead Free Status / Rohs Status: Not Compliant

REV. A
Pin Name
ASDATA (O)
DSDATA1 (I)
DSDATA2 (I)/AAUXDATA1 (I)
DSDATA3 (I)/AAUXDATA2 (I)
DSDATA4 (I)/AAUXDATA3 (I)
ALRCLK (O)
ABCLK (O)
DLRCLK (I)/AUXLRCLK (I/O)
DBCLK (I)/AUXBCLK (I/O)
(FROM AUX ADC NO. 1)
(FROM AUX ADC NO. 1)
(FROM AUX ADC NO. 2)
(FROM AUX ADC NO. 1)
(FROM AUX ADC NO. 3)
AAUXDATA2 (IN)
AAUXDATA1 (IN)
AAUXDATA3 (IN)
TDM (OUT)
LRCLK I
ASDATA1
DSDATA1
DSDATA1
BCLK I
ASDATA
TDM (IN)
FSTDM
BCLK
TDM
AUX
AUX
2
2
S
S
AUX BCLK FREQUENCY IS 64
MSB TDM
MSB TDM
1ST
1ST
CH
CH
INTERNAL
INTERNAL
DAC L1
ADC L1
32
32
I
I
I
I
I
I
LRCLK for ADC
BCLK for ADC
LRCLK In/Out Internal DACs
BCLK In/Out Internal DACs
2
2
2
2
2
2
S Mode
S Data Out, Internal ADC
S Data In, Internal DAC1
S Data In, Internal DAC2
S Data In, Internal DAC3
S Data In, Internal DAC4
Table IV. Pin Function Changes in Auxiliary Mode
AUX_ADC L2
INTERNAL
DAC L2
I
I
I
2
2
2
S – MSB LEFT
S – MSB LEFT
S – MSB LEFT
Figure 11. Auxiliary Mode Timing
FRAME RATE; TDM BCLK FREQUENCY IS 256
LEFT
AUX_ADC L3
INTERNAL
DAC L3
–17–
AUX_ADC L4
INTERNAL
DAC L4
Auxiliary Mode
TDM Data Out to SHARC.
TDM Data In from SHARC.
AUX-I
AUX-I
AUX-I
TDM Frame Sync Out to SHARC (FSTDM).
TDM BCLK Out to SHARC.
AUX LRCLK In/Out. Driven by external LRCLK from
ADC in slave mode. In master mode, driven by
MCLK/512.
AUX BCLK In/Out. Driven by external BCLK from ADC
in slave mode. In master mode, driven by MCLK/8.
INTERNAL
INTERNAL
DAC R1
ADC R1
2
2
2
S Data In 1 (from External ADC).
S Data In 2 (from External ADC).
S Data In 3 (from External ADC).
FRAME RATE.
AUX_ADC R2
INTERNAL
DAC R2
AUX_ADC R3
INTERNAL
DAC R3
RIGHT
I
I
I
2
2
2
S – MSB RIGHT
S – MSB RIGHT
S – MSB RIGHT
AUX_ADC R4
INTERNAL
MSB TDM
MSB TDM
DAC R4
8TH
8TH
CH
CH
AD1837A