AD1986JSTZ-REEL Analog Devices Inc, AD1986JSTZ-REEL Datasheet - Page 19

IC CODEC HD AUDIO AC'97 48LQFP

AD1986JSTZ-REEL

Manufacturer Part Number
AD1986JSTZ-REEL
Description
IC CODEC HD AUDIO AC'97 48LQFP
Manufacturer
Analog Devices Inc
Series
SoundMAX®r
Type
Audio Codec '97, HDr
Datasheet

Specifications of AD1986JSTZ-REEL

Data Interface
Serial
Resolution (bits)
20 b
Number Of Adcs / Dacs
2 / 6
Sigma Delta
No
Dynamic Range, Adcs / Dacs (db) Typ
85 / 91
Voltage - Supply, Analog
4.5 V ~ 5.5 V
Voltage - Supply, Digital
2.97 V ~ 3.63 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Preliminary Technical Data
PC BEEP (REGISTER 0x0A)
This controls the level of the Analog PC beep or the level and frequency of the Digital PC beep. The volume register contains four bits,
generating 16 volume steps of −3.0 dB each for a range of 0 dB to −45.0 dB. The tone frequency can be set between 47 Hz to 12,000 Hz or
disabled.
Per Intel’s BIOS writer’s guide, the PC beep signal should play via headphone out, line out, and mono out paths. BIOS algorithms should
unmute the PC beep register and the path to each output, and set the volume levels for playback.
When the AD1986 is in reset (the external RESET pin is low), the PCBEEP_IN pin is connected internally to all of the device output pins
(HEADPHONE L/R, LINE_OUT L/R, MONO_OUT, SURROUND L/R, and CENTER/LFE). There are no amplifiers or attenuators on
this path and the external circuitry connected to this pin should anticipate the drive requirements for the multiple output sources.
Headphones connected to output pins will substantially load the signal.
Reg
0x0A
Table 34.
Register
V [3:0]
(Analog or
Digital
Volume)
F [7:0]
(PC Beep
Frequency)
A/DS
(PC Beep
Source)
M
(PC Beep
Mute)
x
PHONE VOLUME (REGISTER 0x0C)
This register controls the PHONE_IN mute and gain to the analog mixer section. The volume register contains five bits, generating
32 volume steps of 1.5 dB each for a range of 12.0 dB to −34.5 dB. This does not control the record ADC gain (see Register 0x1C).
Reg
0x0C
Name
Phone
Volume
Name
PC
Beep
Function
Controls the gain into the output mixer from 0 dB to −45.0 dB. The least significant bit represents −3.0 dB. The gain default
is 0 dB and muted.
M
0
0
1
The result of dividing the 48 kHz clock by four times this number, allowing tones from 47 Hz to 12 kHz. A value of 0x00
disables internal PC beep generation. The digitally-generated signal is close to a square wave and is not intended to be a
high quality signal.
Selects either the digital PC beep generator (= 0) or analog PCBEEP pin (= 1). When the
CODEC is in reset mode the analog PCBEEP pin is routed to the outputs via a high
impedance path. Once ot of reset, this bit must be programmed to a 1 to pass through any
signals on the analog PCBEEP pin. Designers may choose not to connect the analog PCBEEP
pin and use the digital PC beep generator solely.
When this bit is set to 1, the PC beep signal (analog or digital) is muted.
Reserved.
D15
M
D15
M
D14
A/DS
V3...V0
0000
1111
xxxx
F7...F0
0000
0001
1111
D14
x
D13
x
D13
x
D12
F7
D12
x
D11
F6
Function
0 dB
−45 dB attenuation
Muted
Function
Disabled
12,000 Hz tone
47 Hz tone
D11
x
D10
F5
D10
x
Rev. 0 | Page 19 of 52
D9
F4
D9
x
D8
F3
D8
x
D7
F2
D7
x
D6
F1
D6
x
D5
F0
D5
x
D4
V3
D4
V4
D3
V2
D3
V3
Default
Default
Default
Default: digitally-selected
(0x0)
Default: muted (0x1)
Default: 0
D2
V1
D2
V2
V0
D1
D1
V1
D0
x
D0
V0
AD1986
Default
0x8000
Default
0x8008

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