AD1986JSTZ-REEL Analog Devices Inc, AD1986JSTZ-REEL Datasheet
AD1986JSTZ-REEL
Specifications of AD1986JSTZ-REEL
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AD1986JSTZ-REEL Summary of contents
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FEATURES AC `97 2.3 COMPLIANT FEATURES 6 DAC channels for 5.1 surround S/PDIF output Integrated headphone amplifiers Variable rate audio Double rate audio ( kHz) s Greater than 90 dB dynamic range 20-bit resolution on all DACs 20-bit ...
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AD1986 TABLE OF CONTENTS Functional Block Diagram .............................................................. 4 Specifications..................................................................................... 5 AC ’97 Timing Parameters .......................................................... 9 Absolute Maximum Ratings.......................................................... 12 Environmental Conditions........................................................ 12 ESD Caution................................................................................ 12 Pin Configuration And Function Description ........................... 13 AC ’97 Registers .............................................................................. 15 Register ...
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NOTES REDUCED SUPPORT COMPONENTS The AD1986’s many improvements reduce external support components for particular applications. • Multiple Microphone Sourcing: The MIC_1/2, LINE_IN and C/LFE pins may all be selected as sources for microphone input (boost amplifier). • Multiple VREF_OUT Pins: ...
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AD1986 FUNCTIONAL BLOCK DIAGRAM MIC_1 MICROPHONE MIC_2 SELECTOR/ MIXING AND GAIN BLOCK PHONE_IN CD_L CD CD_GND DIFF AMP CD_R AUX_L AUX_R LINE_IN_L LINE LINE_IN_R IN SELECT PCBEEP_IN MZ LFE_OUT CENTER_OUT MONO_OUT SURR_OUT_L MZ A ...
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SPECIFICATIONS Test conditions, unless otherwise noted. Table 1. Parameter Temperature Digital Supply ( Analog Supply ( Sample Rate ( Input Signal Analog Output Pass Band DAC ...
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AD1986 Table 5. Analog Mixer—Input Gain/Amplifiers/Attenuators Parameter Signal-to-Noise Ratio (SNR LINE_OUT 1 LINE, AUX, PHONE to LINE_OUT 1 MIC_1 or MIC_2 to LINE_OUT Step Size: All Mixer Inputs (Except PC Beep) Step Size: PC Beep Input Gain/Attenuation Range: ...
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Table 8. Digital-to-Analog Converters Parameter Resolution Total Harmonic Distortion (LINE_OUT Drive) Total Harmonic Distortion HP_OUT Dynamic Range (−60 dB Input, THD + N referenced to Full Scale, A-Weighted) Gain Error (Full-Scale Span Relative to Nominal Input Voltage) Interchannel Gain Mismatch ...
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AD1986 Table 11. Power Supply (Quiescent State) Parameter Power Supply Range—Analog (AV ) ±10% DD Power Supply Range—Digital (DV ) ±10% DD Power Dissipation—Analog (AV )/Digital (DV DD Analog Supply Current—Analog ( Digital Supply Current—Digital ( ...
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AC ’97 TIMING PARAMETERS Guaranteed over operating temperature range. Refer to the AC ’97 specifications (Revision 2.3, Release 1.0) for further information. The specification can be downloaded from http://developer.intel.com/ial.scalableplatforms/audio. RESET BIT_CLK Table 14. Symbol Parameter t Recommended During Active (Low) ...
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AD1986 Table 17. Symbol Parameter t BITCLK High Pulse Width SYNC_HIGH t BITCLK Low Pulse Width CLK_LOW t BITCLK Period CLK_PERIOD BIT_CLK Frequency BIT_CLK Frequency Accuracy 1, 2 BIT_CLK Jitter t Sync Active (High) Pulse Width SYNC_HIGH t Sync Inactive ...
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Ta ble 19. Sy mbol Parameter t BIT_CLK Rise Time RISECLK t BIT_CLK Fall Time FALLCLK t SYNC Rise Time RISESYNC t SYNC Fall Time RISESYNC t SDATA_IN Rise Time RISEDIN t SDATA_IN Fall Time RISEDIN t SDATA_OUT Rise Time ...
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AD1986 ABSOLUTE MAXIMUM RATINGS Table 21. Power Supply Min Digital (DV ) −0.3 DD Analog (AV ) −0.3 DD Input Current (Except Supply Pins) Analog Input Voltage (Signal Pins) −0.3 Digital Input Voltage (Signal Pins) −0.3 Ambient Temperature (Operating) Commercial ...
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PIN CONFIGURATION AND FUNCTION DESCRIPTION SDATA_OUT Table 23. Pin Function Descriptions Mnemonic Pin Number AC ’97CK 2 SDATA_OUT 5 BIT_CLK 6 SDATA_IN 8 SYNC 10 RESET 11 Table 24. Digital Input/Output Pin Input/ Mnemonic Number Output S/PDIF_OUT 48 O EAPD ...
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AD1986 Table 26. Analog Input/Output Pin Input/ Mnemonic Number Ouput PCBEEP 12 I PHONE_IN 13 I AUX_L 14 I AUX_R 15 I CD_L 18 I CD_GND 19 I CD_R 20 I MIC_1 21 I MIC_2 22 I LINE_IN_L 23 I ...
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AC ’97 REGISTERS Table 29. Register Map Reg Name D15 D14 D13 0x00 Reset x SE4 SE3 0x02 Master Volume 0x04 Headphones Volume 0x06 Mono Volume 0x0A PC Beep M A/DS ...
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AD1986 Reg Name D15 D14 D13 0x661 Function Select 0x681 Function Information 0x6A1 Sense Register ST2 ST1 ST0 1 CODEC is always master, ID bits are read-only 0 (zeros). 2 Bits for the AD198x ...
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Preliminary Technical Data REGISTER DETAILS RESET (REGISTER 0x00) Writing any value to this register performs a register reset, which causes all registers to revert to their default values. The serial configuration (0x74) register will not reset the SLOT16, REGM [2:0], ...
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AD1986 Table 31. Register Function L/RV [4:0] Left/right volume controls the left/right channel output gains from –46.5 dB. (Left/Right The least significant bit represents –1.5 dB. Volume) L/RM L/RV [4: 0000 0 0 1111 0 ...
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Preliminary Technical Data PC BEEP (REGISTER 0x0A) This controls the level of the Analog PC beep or the level and frequency of the Digital PC beep. The volume register contains four bits, generating 16 volume steps of −3.0 dB each ...
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AD1986 Table 35. Register Function V [4:0] Controls the gain of this input to the analog mixer from 12 −34.5 dB. The least significant bit represents −1.5 dB. (Volume) MV [4: 0000 0 0 1000 0 ...
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Preliminary Technical Data LINE IN VOLUME (REGISTER 0x10) This register controls the LINE_IN gain and mute to the analog mixer section. The volume register contains five bits, generating 32 volume steps of −1.5 dB each for a range of +12.0 ...
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AD1986 AUX VOLUME (REGISTER 0x16) This register controls the AUX_IN gain and mute to the analog mixer section. The volume register contains five bits, generating 32 volume steps of −1.5 dB each for a range of +12 −34.5 ...
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Preliminary Technical Data ADC SELECT (REGISTER 0x1A) This register selects the record source for the ADC, independently for the right and left channels. The default value is 0x0000, which corresponds to the MIC_1/2 input for both channels. Reg Name D15 ...
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AD1986 OMS [2:0] MMIX 2CMIC MS 101 101 101 101 101 110 110 110 0 1 ...
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Preliminary Technical Data GENERAL-PURPOSE (REGISTER 0x20) This register should be read before writing to generate a mask for only the bit(s) that need to be changed. Reg Name D15 D14 D13 0x20 General- Purpose Table 44. Register ...
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AD1986 Register Function I1 Writing this bit causes a sense cycle start if supported sense cycle is in progress, writing this bit will (Sense Cycle abort the sense cycle. The data in ...
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Preliminary Technical Data Register ADC REF (RO) VREF_OUT pin output states controlled by the CV (Voltage REF References, V REF 0 and VREF_OUT 1 status (read only)) PR0 All ADCs and input selectors’ power down: clearing this bit enables VREF ...
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AD1986 Register Description CDAC (RO) PCM CENTER DAC: read only SDAC (RO) PCM Surround DAC: read only LDAC (RO) PCM LFE DAC: read only AMAP (RO) Slot DAC mappings: read only REV [1:0] (RO) AC97 version: read only ID [1:0] ...
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Preliminary Technical Data Register Function LDAC (RO) LDAC LFE DAC Status (LFE DAC 0 LFE DAC not ready Status (RO)) 1 LFE DAC section ready to receive data SPCV (RO) Indicates the status of the SPDIF transmitter subsystem, enabling the ...
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AD1986 SURROUND DAC PCM RATE (REGISTER 0x2E) This read/write sample rate control register contains a 16-bit unsigned value, representing the rate of operation in Hz. If the VRA bit (0x2A D00 this register is forced to 48 kHz ...
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Preliminary Technical Data C/LFE DAC VOLUME (REGISTER 0x36) This register controls the CENTER/LFE DAC gain and mute to the output selector section. The volume register contains five bits, generating 32 volume steps of −1.5 dB each for a range of ...
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AD1986 SPDIF CONTROL (REGISTER 0x3A) Register 0x3A is a read/write register that controls SPDIF functionality and manages bit fields propagated as channel status (or subframe in the V-case). With the exception of V, this register should only be written to ...
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Preliminary Technical Data EQ CONTROL REGISTER (REGISTER 0x60) Register 0x60 is a read/write register that controls equalizer function and data setup. The register also contains the Biquad and coefficient address pointer, which is used in conjunction with the EQ data ...
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AD1986 EQ DATA REGISTER (REGISTER 0x62) This read/write register is used to transfer EQ biquad coefficients into memory. The register data is transferred to, or retrieved from the address pointed by the BCA bits in the EQ CNTRL register (0x60). ...
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Preliminary Technical Data JACK SENSE (REGISTER 0x72) All register bits are read/write except for JS0ST and JS1ST, which are read only. Important: Please refer to Table 72 to understand how JACK_SENSE_A and JACK_SENSE_B codec pins translate to JS1and JS0. Reg ...
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AD1986 Register Function JSMT [2,0] These 3 bits select and enable the jack sense muting action. See Table 61. (JS Mute Enable selector) JS0DMX This bit enables JS0 to control the down-mix function. This function allows a digital mix of ...
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Preliminary Technical Data REF JS1 JS0 JSMT2 JSMT1 20 OUT (0) OUT ( OUT ( (1) OUT ( ( OUT (0) OUT ...
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AD1986 Register Function 1 LBKS [1:0] These bits select the internal digital loop-back path when LPBK bit is active (see Register 0x20). Loop-Back LBKS [1:0] Selection SPOVR Use this bit to enable S/PDIF operation even if ...
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Preliminary Technical Data MISC CONTROL BITS 1 (REGISTER 0x76) Reg Name D15 D14 D13 76h Misc Control Bits 1 DACZ AC97NC MSPLT Table 63. Register Function MBG [1:0] These two bits allow changing both MIC preamp gain blocks from the ...
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AD1986 Register Function DMIX [1:0] Provides analog down-mixing of the center, LFE and/or surround channels into the mixer channels. This allows (DOWN MIX Mode the full content of 5.1 or quad media to be played through stereo headphones or speakers. ...
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Preliminary Technical Data Register Function JS4–7H This bit selects the audio interrupt implementation path (for JS4 to 7). This bit does not generate an interrupt, rather it Interrupt steers the path of the generated interrupt. Mode Select JS4 to 7H ...
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AD1986 Register Function HPSEL [1:0] This bit allows the headphone power amps to be driven from the surround DACs, C/LFE DACs, or from the mixer outputs. (Headphone HPSEL [1:0] Amplifier 00 Input Select JSINVB SENSE_B: Select the style ...
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Preliminary Technical Data PCI SUBSYSTEM VENDOR ID REGISTER (REGISTER 0x62, PAGE 01) This register is only reset by power-on used by the BIOS to store configuration information (per AC ’97 Revision 2.3 specification) and must not be reset ...
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AD1986 Table 70. Register Function T/R This bit sets which jack conductor the sense value is measured from. Software will program the corresponding rng/tp (FIP or Ring selector bit together with the I/O number in bits FC [3:0]. Once software ...
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Preliminary Technical Data Register Function IV Indicates whether a sensing method is provided by the CODEC and if information field is valid. This field is updated by the (Information CODEC. Valid Bit) IV Function 0 After CODEC reset de-assertion, it ...
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AD1986 SENSE REGISTER (REGISTER 0x6A, PAGE 01) This address represents multiple registers (one for each supported function code (FC [3:0] bits ( only reset by power-on. They are used by the BIOS to store configuration information (per AC ’97 Revision ...
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Preliminary Technical Data Register Function 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B–0x1E 0x1F ST [2:0] This field describes the location of the jack in the system. This field is updated by the BIOS. This bits is only reset by ...
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AD1986 JACK PRESENCE DETECTION The AD1986 uses two jack sense lines for presence detection eight external jacks. These lines, combined with the device detection circuitry, enable software to determine whether there is a device plugged into the ...
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Preliminary Technical Data MICROPHONE SELECTION/MIXING MIC 1 CENTER LINE IN L MIC 2 LFE LINE IN R NID: 0x0F MIC Select: OMS[2:0] 0x74 D10-D08 DEF=000 (MIC 1/2) G 000-MIC 1/2 001-Line In MIC Boost: AC97 01x-C/LFE M20 0x0E D6 DEF=0 ...
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... SEATING 0.05 PLANE ROTATED 90° CCW ORDERING GUIDE Model Temperature Range 1 AD1986JSTZ 0°C to +70°C 1 AD1986JSTZ -REEL 0°C to +70°C 1 AD1986BSTZ –40°C to +85°C 1 AD1986BSTZ -REEL –40°C to +85° Pb-free part. 0.75 1.60 0.60 MAX ...
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Preliminary Technical Data NOTES Rev Page AD1986 ...
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AD1986 NOTES © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04785-0-10/04(0) Rev Page Preliminary Technical Data ...