AD1986JSTZ-REEL Analog Devices Inc, AD1986JSTZ-REEL Datasheet - Page 40

IC CODEC HD AUDIO AC'97 48LQFP

AD1986JSTZ-REEL

Manufacturer Part Number
AD1986JSTZ-REEL
Description
IC CODEC HD AUDIO AC'97 48LQFP
Manufacturer
Analog Devices Inc
Series
SoundMAX®r
Type
Audio Codec '97, HDr
Datasheet

Specifications of AD1986JSTZ-REEL

Data Interface
Serial
Resolution (bits)
20 b
Number Of Adcs / Dacs
2 / 6
Sigma Delta
No
Dynamic Range, Adcs / Dacs (db) Typ
85 / 91
Voltage - Supply, Analog
4.5 V ~ 5.5 V
Voltage - Supply, Digital
2.97 V ~ 3.63 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD1986
Register
DMIX [1:0]
(DOWN MIX Mode
Select)
SODIS
(Surround Output
Enable)
MSPLT (RO)
(Mute Split)
AC ‘97NC (RO)
(AC ‘97 No Compatibility
Mode)
DACZ
(DAC Zero-Fill)
x
ADVANCED JACK SENSE (REGISTER 0x78)
All register bits are read/write except for JSxST bits, which are read-only. Important: Please refer to Table 72 to understand how
JACK_SENSE_A and JACK_SENSE_B codec pins translate to JS7…JS2.
Reg
0x78
Table 64.
Register
JS [7:2] INT
JS [7:4] ST (RO)
JS [3:2] MD
Name
Advanced
Jack Sense
Function
JS [7:4] INT
0
1
This bit always reports the logic state of JS7 thru 4 detection logic.
JS [7:4] ST
0
1
This bit selects the operation mode for JS2 and JS3.
JS [3:2] MD
0
1
Indicates JSx has generated an interrupt. Remains set until the software services JSx interrupt; i.e., JSx ISR should clear
this bit by writing a 0 to it.
1. Interrupts are generated by valid state changes of JSx.
2. Interrupt to the system is actually an OR combination of this bit and JS7 JS0 INT.
3. Interrupt implementation path is selected by the INTS bit (Register 0x74).
4. It is also possible to generate a software system interrupt by writing a 1 to this bit.
D15
JS7
ST
Function
Provides analog down-mixing of the center, LFE and/or surround channels into the mixer channels. This allows
the full content of 5.1 or quad media to be played through stereo headphones or speakers. The jack sense pins
can also be setup to control (gate) this function depending on the JS0DMx and JS1DMx bits (0x72 D [14:13]).
DMIX [1:0]
0x
10
11
Controls the Hi-Z state of the SURROUND output pins. Pins are placed into a Hi-Z mode by software control or
when they are selected as inputs to the LINE_IN selector (see the LISEL [1:0] bits 0x76 D [03:02]).
CLDIS
0
1
Separates the left and right mutes on all volume registers. This bit is read-only 1 (one) on the AD1986 indicating
that mute split is always enabled.
Changes addressing to ADI model (vs. true AC ’97 definition). This bit is read-only 1 (one) on the AD1986
indicating that ADI addressing is always enabled.
Determines DAC data fill under starved condition.
DACZ
0
1
Reserved.
D14
JS7
INT
Read
JSx logic is not interrupting
Sx logic interrupted
Jack State
No jack present
Jack detected
Interrupt Mode
Jack Sense Mode—jack sense state requires software polling
Interrupt Mode—jack sense evetns will generate interrupts
D13
JS6
ST
D12
JS6
INT
D11
JS5
ST
Down-Mix State
No down-mix unless activated by jack sense
Selects 6-to-4 down-mix. The center and LFE channels are
summed equally into the Mixer L/R channels
Selects 6-to-2 down-mix. In addition to the center and LFE
channels, the SURROUND channels are summed into the
mixer L/R channels
SURROUND_OUT State
Outputs enabled
Outputs tri-stated (Hi-Z)
DAC Fill State
DAC data is repeated when DACs are starved for data
DAC data is zero-filled when DACs are starved for data
D10
JS5
INT
Rev. 0 | Page 40 of 52
D9
JS4
ST
D8
JS4
INT
D7
JS4-
7H
Write
Clears JSx interrupt
Generates a software interrupt
D6
x
D5
JS3
MD
Preliminary Technical Data
D4
JS2
MD
D3
JS3
ST
D2
JS2
ST
Default
Default
Default
Default: 0
D1
JS3
INT
D0
JS2
INT
Default
Default
Default
Default
0xxxxx

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