CY7C63801-PXC Cypress Semiconductor Corp, CY7C63801-PXC Datasheet - Page 18

• Manufacturer Part Number: CY7C63801-PXC
• Description: IC USB PERIPHERAL CTRLR 16-DIP
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C63801-PXC

• Controller Type: USB Peripheral Controller
• Interface: USB
• Voltage - Supply: 4 V ~ 5.5 V
• Current - Supply: 40mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 16-DIP (0.300", 7.62mm)
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: MDIP
• Mounting: Through Hole
• Pin Count: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1001 - ISP 4PORT CYPRESS ENCORE II MCUCY4623 - KIT MOUSE REFERENCE DESIGN428-1774 - EXTENSION KIT FOR ENCORE II428-1773 - KIT DEVELOPMENT ENCORE II
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

Table 9-8. ProtectBlock Parameters
9.5.6 EraseAll Function
The EraseAll function performs a series of steps that destroy the
user data in the flash macros and resets the protection block in
each flash macro to all zeros (the unprotected state). The
EraseAll function does not affect the three hidden blocks above
the protection block, in each flash macro. The first of these four
hidden blocks is used to store the protection table for its eight
Kbytes of user data.
The EraseAll function begins by erasing the user space of the
flash macro with the highest address range. A bulk program of
all zeros is then performed on the same flash macro, to destroy
all traces of the previous contents. The bulk program is followed
by a second erase that leaves the flash macro in a state ready
for writing. The erase, program, erase sequence is then
performed on the next lowest flash macro in the address space
if it exists. After the erase of the user space, the protection block
for the flash macro with the highest address range is erased.
Following the erase of the protection block, zeros are written into
every bit of the protection table. The next lowest flash macro in
the address space then has its protection block erased and filled
with zeros.
The end result of the EraseAll function is that all user data in the
flash is destroyed and the flash is left in an unprogrammed state,
ready to accept one of the various write commands. The
protection bits for all user data are also reset to the zero state
The parameter block values that must be set, besides the keys,
are the CLOCK and DELAY values.
Table 9-9. EraseAll Parameters
Document 38-08035 Rev. *N
KEY1
KEY2
CLOCK
DELAY
KEY1
KEY2
CLOCK
DELAY
Name
Name
0,F8h
0,F9h
0,FCh
0,FEh
0,F8h
0,F9h
0,FCh
0,FEh
Address
Address
3Ah
Stack Pointer value when SSC is
executed.
Clock divider used to set the write pulse
width.
For a CPU speed of 12 MHz set to 56h
3Ah
Stack Pointer value when SSC is
executed.
width.
Clock divider used to set the write pulse
For a CPU speed of 12 MHz set to 56h.
Description
Description
9.5.7 TableRead Function
The TableRead function gives the user access to part specific
data stored in the flash during manufacturing. It also returns a
Revision ID for the die (not to be confused with the Silicon ID).
Table 9-10. Table Read Parameters
The table space for the enCoRe II is simply a 64 byte row broken
up into eight tables of eight bytes. The tables are numbered zero
through seven. All user and hidden blocks in the CY7C638xx
parts consist of 64 bytes.
An internal table (Table 0) holds the Silicon ID and returns the
Revision ID. The Silicon ID is returned in SRAM, while the
Revision and Family IDs are returned in the CPU_A and CPU_X
registers. The Silicon ID is a value placed in the table by
programming the flash and is controlled by Cypress Semicon-
ductor Product Engineering. The Revision ID is hard coded into
the SROM and also redundantly placed in SROM Table 1. This
is discussed in more detail later in this section.
SROM Table 1 holds Family/Die ID and Revision ID values for
the device and returns a one-byte internal revision counter. The
internal revision counter starts out with a value of zero and is
incremented when one of the other revision numbers is not incre-
mented. It is reset to zero when one of the other revision
numbers is incremented. The internal revision count is returned
in the CPU_A register. The CPU_X register is always set to FFh
when Table 1 is read. The CPU_A and CPU_X registers always
return a value of FFh when Tables 2-7 are read. The BLOCKID
value, in the parameter block, indicates which table must be
returned to the user. Only the three least significant bits of the
BLOCKID parameter are used by TableRead function for
enCoRe II devices. The upper five bits are ignored. When the
function is called, it transfers bytes from the table to SRAM
addresses F8h–FFh.
The M8C’s A and X registers are used by the TableRead function
to return the die’s Revision ID. The Revision ID is a 16-bit value
hard coded into the SROM that uniquely identifies the die’s
design.
The return values for corresponding Table calls are tabulated as
shown in
Table 9-11. Return values for Table Read
KEY1
KEY2
BLOCKID
Table Number
Name
2-7
0
1
Table 9-11 on page 18
0,F8h
0,F9h
0,FAh
Address
Revision ID
Internal revision counter 0xFF
0xFF
CY7C63310, CY7C638xx
3Ah
Stack Pointer value when SSC is
executed.
Table number to read.
A
Return Value
Description
Family ID
0xFF
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