Z16C3010VSC00TR Zilog, Z16C3010VSC00TR Datasheet - Page 45

• Manufacturer Part Number: Z16C3010VSC00TR
• Description: IC Z16C32 MCU USC 68PLCC
• Manufacturer: Zilog
• Series: USC®r

Specifications of Z16C3010VSC00TR

• Controller Type: USC Controller
• Interface: DMA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 7mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 68-LCC (J-Lead)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Functional Description
DS007902-0708
Data Communications Capabilities
The functional capabilities of the USC are described from two different points of view: as
a data communications device, it transmits and receives data in a wide variety of data
communications protocols; as a microprocessor peripheral, the USC offers such features
as read/write registers, a flexible bus interface, DMA interface support, and vectored inter-
rupts.
The USC provides two independent full-duplex channels programmable for use in any
common data communication protocol. The receiver and transmitter modes are com-
pletely independent, as are the two channels. Each receiver and transmitter is supported by
a 32-byte deep FIFO and a 16-bit message length counter. All modes allow optional even,
odd, mark or space parity. Synchronous modes allow the choice of two 16-bit or one 32-bit
CRC polynomial. Selection of from one to eight bits-per-character is available in both
receiver and transmitter, independently. Error and status conditions are carried with the
data in the receive and transmit FIFOs to greatly reduce the CPU overhead required to
send or receive a message. Specific, appropriately timed interrupts are available to signal
such conditions as overrun, parity error, framing error, end-of-frame, idle line received,
sync acquired, transmit underrun, CRC sent, closing sync/flag sent, abort sent, idle line
sent, and preamble sent. In addition, several useful internal signals such as receive FIFO
load, received sync, transmit FIFO read and transmission complete may be sent to pins for
use by external circuitry.
Asynchronous Mode—
32, or 1/64 the clock rate. The receiver rejects start bits less than one-half a bit time and
will not erroneously assemble characters following a framing error. The transmitter is
capable of sending one, two, or anywhere in the range of 1/16 to two stop bits per charac-
ter in 1/16 bit increments.
External Sync Mode—
externally-supplied signal on a pin for custom protocol applications.
Isochronous Mode—
using a 1x clock. The transmitter can send one or two stop bits.
Asynchronous With Code Violations—
the start bit is replaced by a three bit-time code violation pattern as in MIL-STD 1553B.
The transmitter can send zero, one or two stop bits.
Monosync Mode—
character can be either eight bits long with an arbitrary data character length, or pro-
grammed to match the data character length. The receiver is capable of automatically
stripping sync characters from the received data stream. The transmitter may be pro-
In this mode, a single character is used for synchronization. The sync
Both transmitter and receiver may operate on start-stop (async) data
The receiver is synchronized to the receive data stream by an
The receiver and transmitter can handle data at a rate of 1/16, 1/
P R E L I M I N A R Y
This is similar to Isochronous mode except that
Product Specification
Functional Description
Z16C30
41