DS21FF42 Maxim Integrated Products, DS21FF42 Datasheet - Page 20

• Manufacturer Part Number: DS21FF42
• Description: IC FRAMER T1 4X4 16CH 300-BGA
• Manufacturer: Maxim Integrated Products

Specifications of DS21FF42

• Controller Type: T1 Framer
• Interface: Parallel/Serial
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 300mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 300-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

If enabled via TCR1.2, this pin will be sampled on the falling edge of TCLK for data insertion into either
the FDL stream (ESF) or the Fs–bit position (D4) or the Z–bit position (ZBTSI). See Section 19 for
details. This signal is not bonded out in the DS21FF42/DS21FT42.
A pulse at this pin will establish either frame or multiframe boundaries for the transmit side. Via
TCR2.2, the DS21Q42 can be programmed to output either a frame or multiframe pulse at this pin. If
this pin is set to output pulses at frame boundaries, it can also be set via TCR2.4 to output double–wide
pulses at signaling frames. See Section 24 for details.
Only used when the transmit side elastic store is enabled. A pulse at this pin will establish either frame
or multiframe boundaries for the transmit side. Should be tied low in applications that do not use the
transmit side elastic store.
When enabled, this input will sample signaling bits for insertion into outgoing PCM T1 data stream.
Sampled on the falling edge of TCLK when the transmit side elastic store is disabled. Sampled on the
falling edge of TSYSCLK when the transmit side elastic store is enabled. This function is available when
FMS = 0. FMS is tied to ground for the DS21FF42/DS21FT42.
Updated on the rising edge of TCLK with the bipolar data out of the transmit side formatter. Can be
programmed to source NRZ data via the Output Data Format (CCR1.6) control bit.
Updated on the rising edge of TCLK with the bipolar data out of the transmit side formatter.
RECEIVE SIDE PINS
Updated with either FDL data (ESF) or Fs bits (D4) or Z bits (ZBTSI) one RCLK before the start of a
frame. See Section 24 for details. This signal is not bonded out in the DS21FF42/DS21FT42.
Signal Name:
Signal Description:
Signal Type:
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Signal Description:
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Signal Description:
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Signal Description:
Signal Type:
TLINK
Transmit Link Data
Input
TSYNC
Transmit Sync
Input /Output
TSSYNC
Transmit System Sync
Input
TSIG
Transmit Signaling Input
Input
TPOS
Transmit Positive Data Output
Output
TNEG
Transmit Negative Data Output
Output
RLINK
Receive Link Data
Output
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