DS21FF42 Maxim Integrated Products, DS21FF42 Datasheet - Page 89

• Manufacturer Part Number: DS21FF42
• Description: IC FRAMER T1 4X4 16CH 300-BGA
• Manufacturer: Maxim Integrated Products

Specifications of DS21FF42

• Controller Type: T1 Framer
• Interface: Parallel/Serial
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 300mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 300-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

ID CODE STRUCTURE Table 22-2
DEVICE ID CODES Table 22-3
Highz
All digital outputs of the DS21Q42 will be placed in a high impedance state. The BYPASS register will
be connected between JTDI and JTDO.
Clamp
All digital outputs of the DS21Q42 will output data from the boundary scan parallel output while
connecting the bypass register between JTDI and JTDO. The outputs will not change during the CLAMP
instruction.
23.4 TEST REGISTERS
IEEE 1149.1 requires a minimum of two test registers; the bypass register and the boundary scan register.
An optional test register has been included with the DS21Q42 design.
identification register and is used in conjunction with the IDCODE instruction and the Test-Logic-Reset
state of the TAP controller.
Boundary Scan Register
This register contains both a shift register path and a latched parallel output for all control cells and
digital I/O cells and is 126 bits in length. Table 23-4 shows all of the cell bit locations and definitions.
Bypass Register
This is a single 1-bit shift register used in conjunction with the BYPASS, CLAMP, and HIGHZ
instructions, which provides a short path between JTDI and JTDO.
Identification Register
The identification register contains a 32-bit shift register and a 32-bit latched parallel output. This
register is selected during the IDCODE instruction and when the TAP controller is in the Test-Logic-
Reset state.
Contents
Length
DS21Q42
DS21Q44
DEVICE
MSB
(Contact Factory)
Version
4 bits
(See Table 23-3)
Device ID
16 bits
16-BIT NUMBER
89 of 114
0000h
0001h
“00010100001”
JEDEC
11 bits
This test register is the
LSB
1 bit
“1”