DS1220Y-200IND+ Dallas Semiconductor, DS1220Y-200IND+ Datasheet - Page 4

• Manufacturer Part Number: DS1220Y-200IND+
• Description: Memory; 16k Nonvolatile SRAM; 200 ns; 5 V (Typ.); 85 mA; 200 ns; 200 ns; 1.5 V
• Manufacturer: Dallas Semiconductor

Specifications of DS1220Y-200IND+

• Capacitance, Input: 5 pF
• Capacitance, Output: 5 pF
• Current, Input, Leakage: ±1 μA
• Current, Operating: 85 mA
• Current, Output, Leakage: ±1
• Data Retention: 10 yrs.
• Density: 16K
• Interface: Parallel Bus
• Memory Type: Non-Volatile SRAM
• Organization: 2K×8
• Package Type: 720 EMOD
• Temperature, Operating: -40 to +85 °C
• Time, Access: 200 ns
• Time, Address Hold: 5
• Time, Fall: 5 ns
• Time, Rise: 5 ns
• Voltage, Input, High: 5 V
• Voltage, Input, Low: 0.8 V
• Voltage, Supply: 5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

POWER-DOWN/POWER-UP CONDITION
SEE NOTE 11
POWER-DOWN/POWER-UP TIMING
WARNING:
Under no circumstance are negative undershoots, of any amplitude, allowed when device is in battery
backup mode.
NOTES:
1. WE is high for a read cycle.
2. OE = V
3. t
4. t
5. These parameters are sampled with a 5 pF load and are not 100% tested.
PARAMETER
V
V
PARAMETER
Expected Data Retention Time
CE at V
CE at V
CC
CC
state.
going low to the earlier of CE or WE going high.
WP
DS
Slew from V
Slew from 0V to V
are measured from the earlier of CE or WE going high.
is specified as the logical AND of CE and WE . t
IH
IH
IH
before Power-Down
after Power-Up
or V
TP
IL
. If OE = V
to 0V
TP
IH
during a write cycle, the output buffers remain in a high impedance
SYMBOL
SYMBOL
t
t
t
REC
t
t
DR
PD
R
F
6 of 9
MIN
MIN
100
10
0
0
WP
is measured from the latter of CE or WE
MAX
MAX
2
UNITS
UNITS
years
ms
μs
μs
μs
(T
A
= +25°C)
NOTES
NOTES
11
9