PIC18F4550-I/P Microchip Technology Inc., PIC18F4550-I/P Datasheet - Page 238

• Manufacturer Part Number: PIC18F4550-I/P
• Description: 40 PIN, 32 KB FLASH, 2048 RAM, FS-USB 2.0
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4550-I/P

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 12 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 34
• Interface: I2C/SPI/UART/USART/USB
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 2K Bytes
• Speed: 48 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2455/2550/4455/4550
TABLE 19-4:
DS39632C-page 236
INTCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
TRISC
TRISD
SSPBUF
SSPADD
TMR2
PR2
SSPCON1
SSPCON2
SSPSTAT
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the MSSP in I
Note 1:
Name
(1)
These registers or bits are not implemented in 28-pin devices.
MSSP Receive Buffer/Transmit Register
MSSP Address Register in I
MSSP Baud Rate Reload Register in I
Timer2 Register
Timer2 Period Register
GIE/GIEH PEIE/GIEL
SPPIF
SPPIE
SPPIP
OSCFIE
OSCFIP
OSCFIF
TRISC7
TRISD7
WCOL
GCEN
Bit 7
SMP
REGISTERS ASSOCIATED WITH I
(1)
(1)
(1)
ACKSTAT
TRISC6
TRISD6
SSPOV
CMIF
CMIE
CMIP
ADIE
ADIP
ADIF
Bit 6
CKE
TMR0IE
TRISD5
SSPEN
ACKDT
USBIF
USBIE
USBIP
RCIE
RCIP
RCIF
Bit 5
D/A
2
—
C Slave mode.
TRISD4
ACKEN
INT0IE
2
Preliminary
EEIE
EEIP
Bit 4
TXIF
TXIE
TXIP
EEIF
C Master mode.
CKP
—
P
2
C™ OPERATION
TRISD3
SSPM3
SSPIF
SSPIE
SSPIP
BCLIF
BCLIE
BCLIP
RCEN
RBIE
Bit 3
—
S
TMR0IF
CCP1IF
CCP1IE
CCP1IP
HLVDIE
HLVDIP
TRISC2
TRISD2
HLVDIF
SSPM2
Bit 2
PEN
R/W
TMR2IF
TMR2IE
TMR2IP
TMR3IF
TMR3IE
TMR3IP
TRISC1
TRISD1
SSPM1
INT0IF
RSEN
Bit 1
© 2006 Microchip Technology Inc.
UA
2
C™ mode.
TMR1IF
TMR1IE
TMR1IP
CCP2IE
CCP2IP
TRISD0
CCP2IF
TRISC0
SSPM0
RBIF
Bit 0
SEN
BF
on Page
Values
Reset
54
51
54
54
54
54
54
54
54
52
52
52
52
52
52
52