MAX13444EASA+ Maxim Integrated Products, MAX13444EASA+ Datasheet - Page 16

IC TXRX J1708 HALF DUPLEX 8-SOIC

MAX13444EASA+

Manufacturer Part Number
MAX13444EASA+
Description
IC TXRX J1708 HALF DUPLEX 8-SOIC
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of MAX13444EASA+

Number Of Drivers/receivers
1/1
Protocol
RS422, RS485
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Operating Supply Voltage
1.62 V to 5.5 V
Supply Current
2 mA
Operating Temperature Range
- 40 C to + 85 C
Data Rate
16 Mbps
Mounting Style
SMD/SMT
Propagation Delay Time Ns
50 ns
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
±15kV ESD-Protected, ±80V Fault-Protected,
Fail-Safe RS-485/J1708 Transceivers
The MAX13444E is designed for J1708 applications. To
configure the MAX13444E, connect DE and RE to GND.
Connect the signal to be transmitted to TXD. Terminate
the bus with the load circuit as shown in Figure 14. The
drivers used by SAE J1708 are used in a dominant-
mode application. DE is active low; a high input on DE
places the outputs in high impedance. When the driver is
disabled (TXD high or DE high), the bus is pulled high by
external bias resistors R1 and R2. Therefore, a logic-level
high is encoded as recessive. When all transceivers are
Figure 13. MAX13442E/MAX13443E Typical RS-485 Network
16
______________________________________________________________________________________
RO
DE
RE
DI
D
MAX13442E
MAX13443E
R
B
A
J1708 Applications
120Ω
B
DI
D
A
DE
RO
R
RE
idle in this configuration, all receivers output logic-high
because of the pullup resistor on A and pulldown resistor
on B. R1 and R2 provide the bias for the recessive state.
C1 and C2 combine to form a lowpass filter, effective for
reducing FM interference. R2, C1, R4, and C2 combine
to form a 1.6MHz lowpass filter, effective for reducing
AM interference. Because the bus is unterminated, at
high frequencies, R3 and R4 perform a pseudotermina-
tion. This makes the implementation more flexible, as no
specific termination nodes are required at the ends of
the bus.
B
DI
D
A
DE
120Ω
RO
R
RE
B
A
R
D
RO
DE
DI
RE

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