VSC8211XVW Vitesse Semiconductor Corp, VSC8211XVW Datasheet - Page 147

• Manufacturer Part Number: VSC8211XVW
• Description: IC PHY 10/100/1000 SGL 117-LBGA
• Manufacturer: Vitesse Semiconductor Corp
• Type: PHY Transceiverr

Specifications of VSC8211XVW

• Number Of Drivers/receivers: 1/1
• Protocol: Gigabit Ethernet
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 117-LBGA
• Case: BGA
• Dc: 07+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 907-1023

30.3 MII Transmit Timing (100Mbps)
The following specifications are valid when the I/O power supply (VDDIOMAC) is 2.5V or 3.3V, ±10%, the MAC/Media Interface
Mode Select bits (see
GMII/MII mode and the PHY is linked up in 100BASE-T.
30.4 MII Receive Timing (100Mbps)
The following specifications are valid when the I/O power supply (VDDIOMAC) is 2.5V or 3.3V, ±10%, the MAC/Media Interface
Mode Select bits (see
GMII/MII mode and the PHY is linked up in 100BASE-T.
VMDS-10105 Revision 4.1
October 2006
RXD[3:0]
RXCLK
T
T
RXEN
RXER
T
T
RXCLK-Setup
TXCLK-Delay
Symbol
TXD[3:0]
Symbol
RXCLK-Hold
TXCLK-Duty
TX_CLK
TX_EN
TX_ER
section 25.4.8 “Register 23E (17h) - Extended PHY Control Register #4,”
section 25.4.8 “Register 23E (17h) - Extended PHY Control Register #4,”
Min
Min
35
10
10
0
Table 62. MII Transmit AC Timing Specifications (100 Mbps)
T
TX_TCLK-Duty
Table 63. MII Receive Timing Specifications (100 Mbps)
Figure 39. MII Transmit AC Timing (100Mbps)
Typ
Typ
Figure 40. MII Receive AC Timing (100Mbps)
T
TX_TCLK-Delay
Valid Data
Max
Max
25
65
Valid Data
147 of 165
T
RXCLK-Setup
Unit
Unit
ns
ns
ns
%
Delay from TXCLK to TXD[3:0], TXEN, TXER.
TXCLK duty cycle.
RXD[3:0], RXDV, RXER setup time to RXCLK.
RXD[3:0], RXDV, RXER hold time to RXCLK.
Parameter Description & Conditions
Parameter Description & Conditions
T
RXCLK-Hold
page 129) have been set to
page 129) have been set to
Datasheet
VSC8211