PIC16F1826-E/P Microchip Technology Inc., PIC16F1826-E/P Datasheet - Page 170

• Manufacturer Part Number: PIC16F1826-E/P
• Description: 3.5 KB Flash, 256 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F1826-E/P

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 8 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 16
• Interface: CAN/I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 256 Bytes
• Speed: 32 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V

PIC16(L)F1826/27
REGISTER 19-1:
DS41391D-page 170
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-0/0
CxON
CxON: Comparator Enable bit
1 = Comparator is enabled and consumes no active power
0 = Comparator is disabled
CxOUT: Comparator Output bit
If CxPOL = 1 (inverted polarity):
1 = CxVP < CxVN
0 = CxVP > CxVN
If CxPOL = 0 (non-inverted polarity):
1 = CxVP > CxVN
0 = CxVP < CxVN
CxOE: Comparator Output Enable bit
1 = CxOUT is present on the CxOUT pin. Requires that the associated TRIS bit be cleared to actually
0 = CxOUT is internal only
CxPOL: Comparator Output Polarity Select bit
1 = Comparator output is inverted
0 = Comparator output is not inverted
Unimplemented: Read as ‘0’
CxSP: Comparator Speed/Power Select bit
1 = Comparator operates in normal power, higher speed mode
0 = Comparator operates in low-power, low-speed mode
CxHYS: Comparator Hysteresis Enable bit
1 = Comparator hysteresis enabled
0 = Comparator hysteresis disabled
CxSYNC: Comparator Output Synchronous Mode bit
1 = Comparator output to Timer1 and I/O pin is synchronous to changes on Timer1 clock source.
0 = Comparator output to Timer1 and I/O pin is asynchronous.
CxOUT
R-0/0
drive the pin. Not affected by CxON.
Output updated on the falling edge of Timer1 clock source.
CMxCON0: COMPARATOR Cx CONTROL REGISTER 0
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/0
CxOE
R/W-0/0
CxPOL
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U-0
—
R/W-1/1
CxSP
 2011 Microchip Technology Inc.
R/W-0/0
CxHYS
CxSYNC
R/W-0/0
bit 0