PIC16F1826-E/P Microchip Technology Inc., PIC16F1826-E/P Datasheet - Page 209

• Manufacturer Part Number: PIC16F1826-E/P
• Description: 3.5 KB Flash, 256 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F1826-E/P

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 8 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 16
• Interface: CAN/I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 256 Bytes
• Speed: 32 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V

24.3.2
The following steps should be taken when configuring
the CCP module for standard PWM operation:
1.
2.
3.
4.
5.
6.
24.3.3
The PWM standard mode makes use of one of the 8-bit
Timer2/4/6 timer resources to specify the PWM period.
Configuring the CxTSEL<1:0> bits in the CCPTMRS
register selects which Timer2/4/6 timer is used.
24.3.4
The PWM period is specified by the PRx register of
Timer2/4/6. The PWM period can be calculated using
the formula of
EQUATION 24-1:
 2011 Microchip Technology Inc.
Note:
Disable the CCPx pin output driver by setting the
associated TRIS bit.
Load the PRx register with the PWM period
value.
Configure the CCP module for the PWM mode
by loading the CCPxCON register with the
appropriate values.
Load the CCPRxL register and the DCxBx bits
of the CCPxCON register, with the PWM duty
cycle value.
Configure and start Timer2/4/6:
•Select the Timer2/4/6 resource to be used
•Clear the TMRxIF interrupt flag bit of the
•Configure the TxCKPS bits of the TxCON
•Enable the Timer by setting the TMRxON bit
Enable PWM output pin:
•Wait until the Timer overflows and the TMRxIF
•Enable the CCPx pin output driver by clearing
Note 1:
PWM Period
for PWM generation by setting the
CxTSEL<1:0> bits in the CCPTMRS
register.
PIRx register. See Note below.
register with the Timer prescale value.
of the TxCON register.
bit of the PIRx register is set. See Note
below.
the associated TRIS bit.
SETUP FOR PWM OPERATION
In order to send a complete duty cycle and
period on the first PWM output, the above
steps must be included in the setup
sequence. If it is not critical to start with a
complete PWM signal on the first output,
then step 6 may be ignored.
TIMER2/4/6 TIMER RESOURCE
PWM PERIOD
Equation
T
OSC
=
(TMRx Prescale Value)

PWM PERIOD
= 1/F

PRx
24-1.
OSC

+
1
 4 T


OSC

When TMRx is equal to PRx, the following three events
occur on the next increment cycle:
• TMRx is cleared
• The CCPx pin is set. (Exception: If the PWM duty
• The PWM duty cycle is latched from CCPRxL into
24.3.5
The PWM duty cycle is specified by writing a 10-bit
value to multiple registers: CCPRxL register and
DCxB<1:0> bits of the CCPxCON register. The
CCPRxL contains the eight MSbs and the DCxB<1:0>
bits of the CCPxCON register contain the two LSbs.
CCPRxL and DCxB<1:0> bits of the CCPxCON
register can be written to at any time. The duty cycle
value is not latched into CCPRxH until after the period
completes (i.e., a match between PRx and TMRx
registers occurs). While using the PWM, the CCPRxH
register is read-only.
Equation 24-2
width.
Equation 24-3
ratio.
EQUATION 24-2:
EQUATION 24-3:
The CCPRxH register and a 2-bit internal latch are
used to double buffer the PWM duty cycle. This double
buffering is essential for glitchless PWM operation.
The 8-bit timer TMRx register is concatenated with either
the 2-bit internal system clock (F
prescaler, to create the 10-bit time base. The system
clock is used if the Timer2/4/6 prescaler is set to 1:1.
When the 10-bit time base matches the CCPRxH and
2-bit latch, then the CCPx pin is cleared (see
Figure
cycle = 0%, the pin will not be set.)
CCPRxH.
Note:
Duty Cycle Ratio
Pulse Width
24-4).
PIC16(L)F1826/27
The Timer postscaler (see
“Timer2/4/6
determination of the PWM frequency.
PWM DUTY CYCLE
is used to calculate the PWM duty cycle
is used to calculate the PWM pulse
=

T
=
CCPRxL:CCPxCON<5:4>
OSC
PULSE WIDTH
DUTY CYCLE RATIO

---------------------------------------------------------------------- -
CCPRxL:CCPxCON<5:4>
Operation”) is not used in the

(TMRx Prescale Value)
4 PRx

OSC
DS41391D-page 209
), or 2 bits of the
+
1
Section 22.1



