PIC16F74-I/L Microchip Technology Inc., PIC16F74-I/L Datasheet - Page 73

• Manufacturer Part Number: PIC16F74-I/L
• Description: 44 PIN, 7 KB FLASH, 192 RAM, 33 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F74-I/L

• A/d Inputs: 8-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 33
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin PLCC
• Programmable Memory: 7K Bytes
• Ram Size: 192 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

10.1
The BRG supports both the Asynchronous and Syn-
chronous modes of the USART. It is a dedicated 8-bit
baud rate generator. The SPBRG register controls the
period of a free running 8-bit timer. In Asynchronous
mode, bit BRGH (TXSTA<2>) also controls the baud
rate. In Synchronous mode, bit BRGH is ignored.
Table 10-1 shows the formula for computation of the
baud rate for different USART modes which only apply
in Master mode (internal clock).
Given the desired baud rate and F
integer value for the SPBRG register can be calculated
using the formula in Table 10-1. From this, the error in
baud rate can be determined.
TABLE 10-1:
X = value in SPBRG (0 to 255)
TABLE 10-2:
 2002 Microchip Technology Inc.
98h
18h
99h
Legend: x = unknown, - = unimplemented, read as '0'. Shaded cells are not used by the BRG.
Address
SYNC
0
1
USART Baud Rate Generator
(BRG)
TXSTA
RCSTA
SPBRG Baud Rate Generator Register
Name
BAUD RATE FORMULA
REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
(Asynchronous) Baud Rate = F
(Synchronous) Baud Rate = F
CSRC
SPEN
Bit 7
BRGH = 0 (Low Speed)
Bit 6
RX9
TX9
OSC
SREN CREN
TXEN SYNC
Bit 5
, the nearest
Bit 4
OSC
OSC
/(64(X+1))
/(4(X+1))
Bit 3
—
—
It may be advantageous to use the high baud rate
(BRGH = 1), even for slower baud clocks. This is
because the F
baud rate error in some cases.
Writing a new value to the SPBRG register causes the
BRG timer to be reset (or cleared). This ensures the
BRG does not wait for a timer overflow before output-
ting the new baud rate.
10.1.1
The data on the RC7/RX/DT pin is sampled three times
by a majority detect circuit to determine if a high or a
low level is present at the RX pin.
BRGH TRMT TX9D
FERR OERR RX9D
Bit 2
SAMPLING
Bit 1
OSC
/(16(X + 1)) equation can reduce the
Baud Rate = F
BRGH = 1 (High Speed)
Bit 0
PIC16F7X
0000 -010
0000 -00x
0000 0000
Value on:
N/A
POR,
BOR
OSC
DS30325B-page 71
/(16(X+1))
0000 -010
0000 -00x
0000 0000
Value on
RESETS
all other